Datasheet > 逻辑 > 栅极> SN74LVC2G04DCK3

SN74LVC2G04DCK3

更新时间： 2024-11-21 11:07:59

品牌	Logo	应用领域
德州仪器 - TI		栅栅极
页数	文件大小	规格书
13页	335K
描述
2 通道、1.65V 至 5.5V 反相器 \| DCK \| 6 \| -40 to 125

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SN74LVC2G04DCK3 数据手册

SN74LVC2G04

DUAL INVERTER GATE

www.ti.com

SCES195J–APRIL 1999–REVISED JULY 2005

FEATURES

DBV OR DCK PACKAGE

(TOP VIEW)

•

Available in the Texas Instruments

NanoStar™ and NanoFree™ Packages

GND

•

Supports 5-V V_CCOperation

Inputs Accept Voltages to 5.5 V

Max t_pdof 4.1 ns at 3.3 V

Low Power Consumption, 10-µA Max I_CC

±24-mA Output Drive at 3.3 V

YEA, YEP, YZA, OR YZP PACKAGE

(BOTTOM VIEW)

Typical V_OLP(Output Ground Bounce) <0.8 V

at V_CC= 3.3 V, T_A= 25°C

GND

•

Typical V_OHV(Output V_OHUndershoot) >2 V at

V_CC= 3.3 V, T_A= 25°C

I_offSupports Partial-Power-Down Mode

Operation

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

DESCRIPTION/ORDERING INFORMATION

This dual inverter is designed for 1.65-V to 5.5-V V_CCoperation. The SN74LVC2G04 performs the Boolean

function Y = A.

ORDERING INFORMATION

T_A

PACKAGE⁽¹⁾

ORDERABLE PART NUMBER

TOP-SIDE MARKING⁽²⁾

NanoStar™ – WCSP (DSBGA)

0.17-mm Small Bump – YEA

SN74LVC2G04YEAR

NanoFree™ – WCSP (DSBGA)

0.17-mm Small Bump – YZA

(Pb-free)

SN74LVC2G04YZAR

SN74LVC2G04YEPR

SN74LVC2G04YZPR

Reel of 3000

_ _ _CC_

NanoStar™ – WCSP (DSBGA)

0.23-mm Large Bump – YEP

–40°C to 85°C

NanoFree™ – WCSP (DSBGA)

0.23-mm Large Bump – YZP

(Pb-free)

Reel of 3000

Reel of 250

Reel of 3000

Reel of 250

SN74LVC2G04DBVR

SN74LVC2G04DBVT

SN74LVC2G04DCKR

SN74LVC2G04DCKT

SOT (SOT-23) – DBV

SOT (SC-70) – DCK

C04_

CC_

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2) DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.

YEA/YZA,YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one

following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoStar, NanoFree are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...13

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