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SN74LVC2G02-EP PDF预览

SN74LVC2G02-EP

更新时间: 2023-12-18 00:00:00
品牌 Logo 应用领域
德州仪器 - TI 输入元件
页数 文件大小 规格书
9页 298K
描述
DUAL 2-INPUT POSITIVE-NOR GATE

SN74LVC2G02-EP 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:BGA
包装说明:GREEN, WCSP-8针数:8
Reach Compliance Code:unknown风险等级:5.68
系列:LVC/LCX/ZJESD-30 代码:R-PBGA-B8
JESD-609代码:e1长度:1.9 mm
逻辑集成电路类型:NOR GATE湿度敏感等级:1
功能数量:2输入次数:2
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:VFBGA
封装形状:RECTANGULAR封装形式:GRID ARRAY, VERY THIN PROFILE, FINE PITCH
峰值回流温度(摄氏度):260传播延迟(tpd):8.9 ns
座面最大高度:0.5 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:TIN SILVER COPPER
端子形式:BALL端子节距:0.5 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:0.9 mmBase Number Matches:1

SN74LVC2G02-EP 数据手册

 浏览型号SN74LVC2G02-EP的Datasheet PDF文件第2页浏览型号SN74LVC2G02-EP的Datasheet PDF文件第3页浏览型号SN74LVC2G02-EP的Datasheet PDF文件第4页浏览型号SN74LVC2G02-EP的Datasheet PDF文件第5页浏览型号SN74LVC2G02-EP的Datasheet PDF文件第6页浏览型号SN74LVC2G02-EP的Datasheet PDF文件第7页 
SN74LVC2G02-EP  
DUAL 2-INPUT POSITIVE-NOR GATE  
www.ti.com  
SGDS034ASEPTEMBER 2007REVISED SEPTEMBER 2007  
1
FEATURES  
Controlled Baseline  
±24 mA Output Drive at 3.3 V  
One Assembly Site  
One Test Site  
Typical VOLP (Output Ground Bounce)  
<0.8 V at VCC = 3.3 V, TA = 25°C  
Typical VOHV (Output VOH Undershoot)  
>2 V at VCC = 3.3 V, TA = 25°C  
One Fabrication Site  
Extended Temperature Performance of –55°C  
to 125°C  
Ioff Supports Partial-Power-Down Mode  
Operation  
Enhanced Diminishing Manufacturing Sources  
(DMS) Support  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
Enhanced Product Change Notification  
ESD Protection Exceeds JESD 22  
(1)  
Qualification Pedigree  
2000-V Human-Body Model (A114-A)  
1000-V Charged-Device Model (C101)  
Supports 5-V VCC Operation  
Inputs Accept Voltages to 5.5 V  
Max tpd of 5.9 ns at 3.3 V  
Low Power Consumption, 10 μA Max ICC  
(1) Component qualification in accordance with JEDEC and  
industry standards to ensure reliable operation over an  
extended temperature range. This includes, but is not limited  
to, Highly Accelerated Stress Test (HAST) or biased 85/85,  
temperature cycle, autoclave or unbiased HAST,  
electromigration, bond intermetallic life, and mold compound  
life. Such qualification testing should not be viewed as  
justifying use of this component beyond specified  
performance and environmental limits.  
DCU PACKAGE  
(TOP VIEW)  
VCC  
1Y  
2B  
2A  
1
2
3
4
8
7
6
5
1A  
1B  
2Y  
GND  
See mechanical drawings for dimensions.  
DESCRIPTION/ORDERING INFORMATION  
This dual 2-input positive-NOR gate is designed for 1.65-V to 5.5-V VCC operation.  
The SN74LVC2G02 performs the Boolean function Y = A + B or Y = A • B in positive logic.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION(1)  
TA  
PACKAGE(2)  
ORDERABLE PART NUMBER  
TOP-SIDE MARKING  
SBMM  
–55°C to 125°C VSSOP – DCU  
Reel of 3000  
SN74LVC2G02MDCUREP  
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
website at www.ti.com.  
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2007, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

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