Datasheet > 逻辑 > 总线驱动器/收发器> SN74LVC240ADGV

SN74LVC240ADGV

更新时间： 2024-10-03 23:06:23

品牌	Logo	应用领域
德州仪器 - TI		驱动器输出元件
页数	文件大小	规格书
8页	121K
描述
OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

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SN74LVC240ADGV 数据手册

SN74LVC240A

OCTAL BUFFER/DRIVER

WITH 3-STATE OUTPUTS

SCAS293G – JANUARY 1993 – REVISED MARCH 2000

DB, DGV, DW, OR PW PACKAGE

(TOP VIEW)

EPIC (Enhanced-Performance Implanted

CMOS) Submicron Process

Typical V

<0.8 V at V

(Output Ground Bounce)

OLP

1OE

1A1

2Y4

1A2

2Y3

1A3

2Y2

1A4

2Y1

GND

19 2OE

= 3.3 V, T = 25°C

Typical V

(Output V

Undershoot)

OHV

18 1Y1

>2 V at V

= 3.3 V, T = 25°C

2A4

1Y2

2A3

1Y3

2A2

1Y4

2A1

Supports Mixed-Mode Signal Operation on

All Ports (5-V Input/Output Voltage With

3.3-V V

)

Supports Partial-Power-Down-Mode

off

Operation

ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

Latch-Up Performance Exceeds 250 mA Per

JESD 17

Package Options Include Plastic

Small-Outline (DW), Shrink Small-Outline

(DB), Thin Very Small-Outline (DGV), and

Thin Shrink Small-Outline (PW) Packages

description

This octal buffer/driver is designed for 1.65-V to 3.6-V V

operation.

The SN74LVC240A is designed specifically to improve the performance and density of 3-state memory address

drivers, clock drivers, and bus-oriented receivers and transmitters.

This device is organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low,

the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the

high-impedance state.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators

in a mixed 3.3-V/5-V system environment.

To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,

off

preventing damaging current backflow through the device when it is powered down.

The SN74LVC240A is characterized for operation from –40°C to 85°C.

FUNCTION TABLE

(each 4-bit buffer)

INPUTS

OUTPUT

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7 8

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与SN74LVC240ADGV相关器件

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SN74LVC240ADGVR	TI	获取价格	OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVC240ADGVRE4	TI	获取价格	OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVC240ADGVRG4	TI	获取价格	OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVC240ADW	TI	获取价格	OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVC240ADWE4	TI	获取价格	OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVC240ADWG4	TI	获取价格	OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVC240ADWR	TI	获取价格	OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVC240ADWRE4	TI	获取价格	OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVC240ADWRG4	TI	获取价格	OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVC240ANSR	TI	获取价格	OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

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