SN74LVC1G80
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
www.ti.com
SCES221O–APRIL 1999–REVISED JUNE 2005
FEATURES
DBV OR DCK PACKAGE
(TOP VIEW)
•
Available in the Texas Instruments
NanoStar™ and NanoFree™ Packages
1
2
3
D
CLK
GND
V
CC
5
4
•
•
•
•
•
•
Supports 5-V VCC Operation
Inputs Accept Voltages to 5.5 V
Max tpd of 4.2 ns at 3.3 V
Q
Low Power Consumption, 10-µA Max ICC
±24-mA Output Drive at 3.3 V
YEA, YEP, YZA, OR YZP PACKAGE
(BOTTOM VIEW)
Ioff Supports Partial-Power-Down Mode
Operation
3
2
1
4
5
GND
CLK
D
Q
•
•
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
V
CC
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DESCRIPTION/ORDERING INFORMATION
This single positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.
When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the
positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the
rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting
the level at the output.
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER TOP-SIDE MARKING(2)
NanoStar™ – WCSP (DSBGA)
0.17-mm Small Bump – YEA
SN74LVC1G80YEAR
NanoFree™ – WCSP (DSBGA)
0.17-mm Small Bump – YZA (Pb-free)
SN74LVC1G80YZAR
_ _ _CX_
Reel of 3000
NanoStar™ – WCSP (DSBGA)
0.23-mm Large Bump – YEP
SN74LVC1G80YEPR
–40°C to 85°C
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
SN74LVC1G80YZPR
Reel of 3000
Reel of 250
Reel of 3000
Reel of 250
SN74LVC1G80DBVR
C80_
SOT (SOT-23) – DBV
SOT (SC-70) – DCK
SN74LVC1G80DBVT
SN74LVC1G80DCKR
CX_
SN74LVC1G80DCKT
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 1999–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.