Datasheet > SN74LVC1G80_07

SN74LVC1G80_07

更新时间： 2024-10-01 05:29:35

品牌	Logo	应用领域
德州仪器 - TI		触发器
页数	文件大小	规格书
16页	514K
描述
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

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SN74LVC1G80_07 数据手册

SN74LVC1G80

SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

www.ti.com

SCES221Q–APRIL 1999–REVISED JANUARY 2007

FEATURES

•

Available in the Texas Instruments

NanoFree™ Package

•

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

•

Supports 5-V V_CCOperation

ESD Protection Exceeds JESD 22

Inputs Accept Voltages to 5.5 V

Max t_pdof 4.2 ns at 3.3 V

–

2000-V Human-Body Model (A114-A)

200-V Machine Model (A115-A)

Low Power Consumption, 10-µA Max I_CC

±24-mA Output Drive at 3.3 V

1000-V Charged-Device Model (C101)

I_offSupports Partial-Power-Down Mode

Operation

DBV PACKAGE

(TOP VIEW)

DCK PACKAGE

(TOP VIEW)

YZP PACKAGE

(BOTTOM VIEW)

GND

CLK

V_CC

CLK

GND

V_CC

CLK

V_CC

GND

See mechanical drawings for dimensions.

DESCRIPTION/ORDERING INFORMATION

This single positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V V_CCoperation.

When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the

positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the

rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without

affecting the level at the output.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the

package.

This device is fully specified for partial-power-down applications using I_off. The I_offcircuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

ORDERING INFORMATION

T_A

PACKAGE⁽¹⁾

ORDERABLE PART NUMBER TOP-SIDE MARKING⁽²⁾

NanoFree™ – WCSP (DSBGA)

Reel of 3000

SN74LVC1G80YZPR

_ _ _CX_

C80_

0.23-mm Large Bump – YZP (Pb-free)

SOT (SOT-23) – DBV

Reel of 3000

Reel of 250

Reel of 3000

Reel of 250

SN74LVC1G80DBVR

SN74LVC1G80DBVT

SN74LVC1G80DCKR

SN74LVC1G80DCKT

–40°C to 85°C

SOT (SC-70) – DCK

CX_

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2) DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.

YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoFree is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...16

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与SN74LVC1G80_07相关器件

型号	品牌	获取价格	描述	数据表
SN74LVC1G80DBV	TI	获取价格	SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SN74LVC1G80DBVR	TI	获取价格	SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SN74LVC1G80DBVRE4	TI	获取价格	SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SN74LVC1G80DBVRG4	TI	获取价格	SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SN74LVC1G80DBVT	TI	获取价格	SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SN74LVC1G80DBVTE4	TI	获取价格	SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SN74LVC1G80DBVTG4	TI	获取价格	SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SN74LVC1G80DCK	TI	获取价格	SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SN74LVC1G80DCKR	TI	获取价格	SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SN74LVC1G80DCKRE4	TI	获取价格	SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

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