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SCES414G − NOVEMBER 2002 − REVISED SEPTEMBER 2003
DBV OR DCK PACKAGE
(TOP VIEW)
D
Available in the Texas Instruments
NanoStar and NanoFree Packages
D
D
D
D
D
D
D
D
Supports 5-V V
Operation
CC
1
2
3
6
5
4
In1
GND
In0
In2
Inputs Accept Voltages to 5.5 V
V
Y
CC
Max t of 6.3 ns at 3.3 V
pd
Low Power Consumption, 10-µA Max I
24-mA Output Drive at 3.3 V
CC
YEA, YEP, YZA OR YZP PACKAGE
(BOTTOM VIEW)
I
Supports Partial-Power-Down Mode
off
Operation
3 4
2 5
1 6
In0
GND
In1
Y
V
Latch-Up Performance Exceeds 100 mA
Per JESD 78, Class II
CC
In2
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
description/ordering information
This configurable multiple-function gate is designed for 1.65-V to 5.5-V V
operation.
CC
The SN74LVC1G57 features configurable multiple functions. The output state is determined by eight patterns
of 3-bit input. The user can choose the logic functions AND, OR, NAND, NOR, XNOR, inverter, and noninverter.
All inputs can be connected to V
or GND.
CC
This device functions as an independent gate, but because of Schmitt action, it may have different input
threshold levels for positive-going (V ) and negative-going (V ) signals.
T+
T−
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
T
A
PACKAGE
‡
NanoStar − WCSP (DSBGA)
0.17-mm Small Bump − YEA
SN74LVC1G57YEAR
SN74LVC1G57YZAR
SN74LVC1G57YEPR
SN74LVC1G57YZPR
NanoFree − WCSP (DSBGA)
0.17-mm Small Bump − YZA (Pb-free)
Tape and reel
_ _ _CL_
NanoStar − WCSP (DSBGA)
0.23-mm Large Bump − YEP
−40°C to 85°C
NanoFree − WCSP (DSBGA)
0.23-mm Large Bump − YZP (Pb-free)
SOT (SOT-23) − DBV
SOT (SC-70) − DCK
Tape and reel
Tape and reel
SN74LVC1G57DBVR
SN74LVC1G57DCKR
CA7_
CL_
†
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA,YEP/YZP:The actual top-side marking has three preceding characters to denote year, month, and sequence code,
and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition
(1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
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Copyright 2003, Texas Instruments Incorporated
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