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SN74LVC1G34YFPR

更新时间： 2024-11-02 06:12:59
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
19页 811K
描述
SINGLE BUFFER GATE

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SN74LVC1G34YFPR 数据手册

 浏览型号SN74LVC1G34YFPR的Datasheet PDF文件第2页浏览型号SN74LVC1G34YFPR的Datasheet PDF文件第3页浏览型号SN74LVC1G34YFPR的Datasheet PDF文件第4页浏览型号SN74LVC1G34YFPR的Datasheet PDF文件第5页浏览型号SN74LVC1G34YFPR的Datasheet PDF文件第6页浏览型号SN74LVC1G34YFPR的Datasheet PDF文件第7页 
SN74LVC1G34  
www.ti.com................................................................................................................................................... SCES519H–DECEMBER 2003–REVISED JULY 2008  
SINGLE BUFFER GATE  
1
FEATURES  
2
•
Available in the Texas Instruments NanoFree™  
Package  
•
•
•
Ioff Supports Partial-Power-Down Mode  
Operation  
•
•
•
•
•
Supports 5-V VCC Operation  
Inputs Accept Voltages to 5.5 V  
Max tpd of 3.5 ns at 3.3 V  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Protection Exceeds JESD 22  
–
–
–
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
Low Power Consumption, 1-µA Max ICC  
±24-mA Output Drive at 3.3 V  
1000-V Charged-Device Model (C101)  
DBV PACKAGE  
(TOP VIEW)  
DCK PACKAGE  
(TOP VIEW)  
DRL PACKAGE  
(TOP VIEW)  
VCC  
1
2
3
5
4
VCC  
N.C.  
A
1
2
3
5
N.C.  
VCC  
1
2
3
5
N.C.  
A
A
GND  
Y
4
GND  
Y
4
GND  
Y
See mechanical drawings for dimensions.  
N.C. – No internal connection  
YZP PACKAGE  
(TOP VIEW)  
YZP PACKAGE TERMINAL ASSIGNMENTS  
1
2
VCC  
No ball  
Y
A1  
B1  
C1  
A2  
DNU  
A
VCC  
A
B
C
DNU  
A
C2  
GND  
Y
GND  
DNU – Do not use  
YZV PACKAGE  
(TOP VIEW)  
YFP PACKAGE  
(TOP VIEW)  
YZV/YFP PACKAGE TERMINAL ASSIGNMENTS  
B
A
GND  
Y
VCC  
2
A1  
A2  
A1 A2  
A
VCC  
Y
A
VCC  
Y
A
B1 B2  
GND  
B1  
B2  
GND  
1
DESCRIPTION/ORDERING INFORMATION  
This single buffer gate is designed for 1.65-V to 5.5-V VCC operation. The SN74LVC1G34 performs the Boolean  
function Y = A in positive logic.  
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the  
package.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
NanoFree is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2003–2008, Texas Instruments Incorporated  
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SN74LVC1G34YFPR 替代型号

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