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SN74LVC1G332YEPR PDF预览

SN74LVC1G332YEPR

更新时间: 2024-11-26 22:13:07
品牌 Logo 应用领域
德州仪器 - TI 逻辑集成电路输入元件
页数 文件大小 规格书
11页 253K
描述
SINGLE 3 INPUT POSITIVE OR GATE

SN74LVC1G332YEPR 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:BGA
包装说明:VFBGA, BGA6,2X3,20针数:6
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.53系列:LVC/LCX/Z
JESD-30 代码:R-XBGA-B6长度:1.4 mm
负载电容(CL):50 pF逻辑集成电路类型:OR GATE
最大I(ol):0.024 A功能数量:1
输入次数:3端子数量:6
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE封装主体材料:UNSPECIFIED
封装代码:VFBGA封装等效代码:BGA6,2X3,20
封装形状:RECTANGULAR封装形式:GRID ARRAY, VERY THIN PROFILE, FINE PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 VProp。Delay @ Nom-Sup:4.8 ns
传播延迟(tpd):17.2 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:0.5 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:BALL
端子节距:0.5 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:0.9 mm
Base Number Matches:1

SN74LVC1G332YEPR 数据手册

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ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈ ꢉꢉ ꢊ  
ꢀꢋ ꢁꢈ ꢄ ꢌ ꢉ ꢍꢋꢁ ꢎꢏꢐ ꢎꢑ ꢀꢋ ꢐ ꢋꢅꢌꢍ ꢑ ꢒ ꢈ ꢓꢐꢌ  
SCES489C − SEPTEMBER 2003 − REVISED MARCH 2004  
DBV OR DCK PACKAGE  
(TOP VIEW)  
D
Available in the Texas Instruments  
NanoStarand NanoFreePackages  
D
D
D
D
D
D
D
D
Supports 5-V V  
Operation  
CC  
1
2
3
6
5
4
A
GND  
B
C
Inputs Accept Voltages to 5.5 V  
V
Y
CC  
Max t of 4.5 ns at 3.3 V  
pd  
Low Power Consumption, 10-µA Max I  
CC  
24-mA Output Drive at 3.3 V  
YEP OR YZP PACKAGE  
(BOTTOM VIEW)  
I
Supports Partial-Power-Down Mode  
off  
Operation  
3 4  
2 5  
1 6  
B
GND  
A
Y
V
C
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
CC  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
− 1000-V Charged-Device Model (C101)  
description/ordering information  
Y + A ) B ) C or Y + A B C  
The SN74LVC1G332 performs the Boolean function  
in positive logic.  
NanoStarand NanoFreepackage technology is a major breakthrough in IC packaging concepts, using the  
die as the package.  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
NanoStar− WCSP (DSBGA)  
0.23-mm Large Bump − YEP  
SN74LVC1G332YEPR  
Reel of 3000  
_ _ _CZ_  
NanoFree− WCSP (DSBGA)  
0.23-mm Large Bump − YZP (Pb-free)  
SN74LVC1G332YZPR  
−40°C to 85°C  
Reel of 3000  
Reel of 250  
Reel of 3000  
SN74LVC1G332DBVR  
SN74LVC1G332DBVT  
SN74LVC1G332DCKR  
SOT (SOT-23) − DBV  
C2C_  
CZ_  
SOT (SC-70) − DCK  
Reel of 250  
SN74LVC1G332DCKT  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.  
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one  
following character to designate the assembly/test site. Pin  
1 identifier indicates solder-bump composition  
(1 = SnPb, = Pb-free).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoStar and NanoFree are trademarks of Texas Instruments.  
ꢎꢒ ꢑ ꢔꢏ ꢆ ꢐꢋ ꢑ ꢁ ꢔ ꢓꢐꢓ ꢕꢖ ꢗ ꢘꢙ ꢚ ꢛꢜ ꢕꢘꢖ ꢕꢝ ꢞꢟ ꢙ ꢙ ꢠꢖꢜ ꢛꢝ ꢘꢗ ꢡꢟꢢ ꢣꢕꢞ ꢛꢜ ꢕꢘꢖ ꢤꢛ ꢜꢠ ꢥ  
ꢎꢙ ꢘ ꢤꢟꢞ ꢜ ꢝ ꢞ ꢘꢖ ꢗꢘ ꢙ ꢚ ꢜ ꢘ ꢝ ꢡꢠ ꢞ ꢕꢗ ꢕꢞꢛ ꢜꢕ ꢘꢖꢝ ꢡꢠ ꢙ ꢜꢦ ꢠ ꢜꢠ ꢙ ꢚꢝ ꢘꢗ ꢐꢠꢧ ꢛꢝ ꢋꢖꢝ ꢜꢙ ꢟꢚ ꢠꢖꢜ ꢝ  
ꢝ ꢜ ꢛ ꢖꢤ ꢛ ꢙꢤ ꢨ ꢛ ꢙꢙ ꢛ ꢖ ꢜꢩꢥ ꢎꢙ ꢘ ꢤꢟꢞ ꢜꢕꢘꢖ ꢡꢙ ꢘꢞ ꢠꢝ ꢝꢕ ꢖꢪ ꢤꢘꢠ ꢝ ꢖꢘꢜ ꢖꢠ ꢞꢠ ꢝꢝ ꢛꢙ ꢕꢣ ꢩ ꢕꢖꢞ ꢣꢟꢤ ꢠ  
ꢜ ꢠ ꢝ ꢜꢕ ꢖꢪ ꢘꢗ ꢛ ꢣꢣ ꢡꢛ ꢙ ꢛ ꢚ ꢠ ꢜ ꢠ ꢙ ꢝ ꢥ  
Copyright 2004, Texas Instruments Incorporated  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74LVC1G332YEPR 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC1G332YZPR TI

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