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SN74LVC1G126DCK PDF预览

SN74LVC1G126DCK

更新时间： 2024-09-13 23:11:03
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
8页 121K
描述
SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUTS

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SN74LVC1G126DCK 技术参数

是否Rohs认证：符合生命周期：Obsolete
零件包装代码：SOT包装说明：PLASTIC, SOT-5
针数：5Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.02
Is Samacsys：N系列：LVC/LCX/Z
JESD-30 代码：R-PDSO-G5长度：2 mm
逻辑集成电路类型：BUS DRIVER位数：1
功能数量：1端口数量：2
端子数量：5最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP5/6,.08
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED传播延迟（tpd）：8 ns
认证状态：Not Qualified座面最大高度：1.1 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：1.65 V
标称供电电压 (Vsup)：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：1.25 mmBase Number Matches：1

SN74LVC1G126DCK 数据手册

 浏览型号SN74LVC1G126DCK的Datasheet PDF文件第2页浏览型号SN74LVC1G126DCK的Datasheet PDF文件第3页浏览型号SN74LVC1G126DCK的Datasheet PDF文件第4页浏览型号SN74LVC1G126DCK的Datasheet PDF文件第5页浏览型号SN74LVC1G126DCK的Datasheet PDF文件第6页浏览型号SN74LVC1G126DCK的Datasheet PDF文件第7页 
SN74LVC1G126  
SINGLE BUS BUFFER GATE  
WITH 3-STATE OUTPUTS  
SCES224C – APRIL 1999 – REVISED FEBRUARY 2000  
DBV OR DCK PACKAGE  
(TOP VIEW)  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
I
Feature Supports Partial-Power-Down  
off  
OE  
A
GND  
V
Y
1
2
3
5
4
CC  
Mode Operation  
Supports 5-V V  
Operation  
CC  
Package Options Include Plastic  
Small-Outline Transistor (DBV, DCK)  
Packages  
description  
This single bus buffer gate is designed for 1.65-V to 5.5-V V  
operation.  
CC  
The SN74LVC1G126 is a single bus driver/line driver with a 3-state output. The output is disabled when the  
output-enable (OE) input is low.  
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a  
pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the  
driver.  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
The SN74LVC1G126 is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Y
OE  
A
H
L
H
H
L
H
L
X
Z
†
logic symbol  
1
2
OE  
A
EN  
4
Y
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.  
logic diagram (positive logic)  
1
2
OE  
A
4
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 2000, Texas Instruments Incorporated  
PRODUCT PREVIEW information concerns products in the formative or  
design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right to  
change or discontinue these products without notice.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
12345678

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SN74LVC1G126DCK 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC1G126DCKR TI

类似代替

 SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT
SN74LVC1G126DBVT TI

类似代替

 SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT
SN74LVC1G126DBVR TI

类似代替

 SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

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SN74LVC1G126DCKT TI

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SN74LVC1G126DRLR TI

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 		SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT
SN74LVC1G126DRYR UMW

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 		逻辑集成电路
SN74LVC1G126DSFR TI

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 		具有三态输出的 1.65V 至 5.5V 单路缓冲器 | DSF | 6 | -40 to
SN74LVC1G126-EP TI

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 		SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

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