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SN74LVC1G10 PDF预览

SN74LVC1G10

更新时间： 2024-11-01 23:11:03
品牌 Logo 应用领域
德州仪器 - TI 输入元件
页数 文件大小 规格书
11页 252K
描述
SINGLE 3 INPUT POSITIVE NAND GATE

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SN74LVC1G10 数据手册

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SCES486B − SEPTEMBER 2003 − REVISED FEBRUARY 2004  
DBV OR DCK PACKAGE  
(TOP VIEW)  
D
Available in the Texas Instruments  
NanoStarand NanoFreePackages  
D
D
D
D
D
D
D
D
Supports 5-V V  
Operation  
CC  
1
2
3
6
5
4
A
GND  
B
C
Inputs Accept Voltages to 5.5 V  
V
Y
CC  
Max t of 3.8 ns at 3.3 V  
pd  
Low Power Consumption, 10-µA Max I  
CC  
24-mA Output Drive at 3.3 V  
YEP OR YZP PACKAGE  
(BOTTOM VIEW)  
I
Supports Partial-Power-Down Mode  
off  
Operation  
3 4  
2 5  
1 6  
B
GND  
A
Y
V
C
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
CC  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
− 1000-V Charged-Device Model (C101)  
description/ordering information  
The SN74LVC1G10 performs the Boolean function Y = A • B • C or Y = A + B + C in positive logic.  
NanoStarand NanoFreepackage technology is a major breakthrough in IC packaging concepts, using the  
die as the package.  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
T
A
PACKAGE  
‡
NanoStar− WCSP (DSBGA)  
0.23-mm Large Bump − YEP  
SN74LVC1G10YEPR  
Tape and reel  
_ _ _C2_  
NanoFree− WCSP (DSBGA)  
0.23-mm Large Bump − YZP (Pb-free)  
SN74LVC1G10YZPR  
−40°C to 85°C  
SOT (SOT-23) − DBV  
Tape and reel  
Tape and reel  
SN74LVC1G10DBVR  
SN74LVC1G10DCKR  
C10_  
C2_  
SOT (SC-70) − DCK  
†
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.  
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one  
following character to designate the assembly/test site. Pin  
1 identifier indicates solder-bump composition  
(1 = SnPb, • = Pb-free).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoStar and NanoFree are trademarks of Texas Instruments.  
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Copyright 2004, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...11

中文翻译

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