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SCES217S − APRIL 1999 − REVISED JUNE 2005
D
Available in the Texas Instruments
NanoStar and NanoFree Packages
D
D
D
I
Supports Partial-Power-Down Mode
off
Operation
D
D
D
D
D
Supports 5-V V
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
CC
Inputs Accept Voltages to 5.5 V
Max t of 3.6 ns at 3.3 V
pd
Low Power Consumption, 10-µA Max I
24-mA Output Drive at 3.3 V
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
CC
− 1000-V Charged-Device Model (C101)
YEA, YEP, YZA,
DBV PACKAGE
(TOP VIEW)
DCK PACKAGE
(TOP VIEW)
DRL PACKAGE
(TOP VIEW)
OR YZP PACKAGE
(BOTTOM VIEW)
3
2
1
4
5
Y
GND
B
1
2
3
5
A
V
Y
A
B
V
1
2
3
5
CC
CC
1
2
3
5
A
B
V
Y
CC
B
V
A
CC
4
GND
Y
4
GND
4
GND
See mechanical drawings for dimensions.
description/ordering information
Y + A • B or Y + A ) B
The SN74LVC1G08 performs the Boolean function
in positive logic.
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,
off
off
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
‡
NanoStar − WCSP (DSBGA)
0.17-mm Small Bump − YEA
SN74LVC1G08YEAR
NanoFree − WCSP (DSBGA)
SN74LVC1G08YZAR
SN74LVC1G08YEPR
SN74LVC1G08YZPR
0.17-mm Small Bump − YZA (Pb-free)
Reel of 3000
_ _ _CE_
NanoStar − WCSP (DSBGA)
0.23-mm Large Bump − YEP
NanoFree − WCSP (DSBGA)
0.23-mm Large Bump − YZP (Pb-free)
−40°C to 85°C
Reel of 3000
Reel of 250
Reel of 3000
Reel of 250
SN74LVC1G08DBVR
SN74LVC1G08DBVT
SN74LVC1G08DCKR
SN74LVC1G08DCKT
SOT (SOT-23) − DBV
C08_
CE_
SOT (SC-70) − DCK
SOT (SOT-553) − DRL
Reel of 4000
SN74LVC1G08DRLR
†
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code,
and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition
(1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
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Copyright 2005, Texas Instruments Incorporated
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