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SN74LVC1G02DSF2

更新时间： 2024-12-01 11:06:23
品牌 Logo 应用领域
德州仪器 - TI 栅栅极
页数 文件大小 规格书
16页 479K
描述
单路 2 输入、1.65V 至 5.5V 或非门 | DSF | 6 | -40 to 125

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SN74LVC1G02DSF2 数据手册

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SCES213Q − APRIL 1999 − REVISED MAY 2005  
D
Available in the Texas Instruments  
NanoStarand NanoFreePackages  
D
D
D
I
Supports Partial-Power-Down Mode  
off  
Operation  
D
D
D
D
D
Supports 5-V V  
Operation  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
CC  
Inputs Accept Voltages to 5.5 V  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
Max t of 3.6 ns at 3.3 V  
pd  
Low Power Consumption, 10-µA Max I  
CC  
24-mA Output Drive at 3.3 V  
− 1000-V Charged-Device Model (C101)  
DBV PACKAGE  
(TOP VIEW)  
DCK PACKAGE  
(TOP VIEW)  
YEA, YEP, YZA,  
OR YZP PACKAGE  
(BOTTOM VIEW)  
DRL PACKAGE  
(TOP VIEW)  
1
2
3
5
A
B
V
Y
1
2
3
5
A
B
V
Y
CC  
CC  
3
2
1
4
Y
GND  
B
1
2
3
5
4
A
B
V
Y
CC  
5
4
GND  
V
A
CC  
4
GND  
GND  
See mechanical drawings for dimensions.  
description/ordering information  
This single 2-input positive-NOR gate is designed for 1.65-V to 5.5-V V  
operation.  
CC  
The SN74LVC1G02 performs the Boolean function Y = A + B or Y = A • B in positive logic.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
T
A
PACKAGE  
‡
NanoStar− WCSP (DSBGA)  
0.17-mm Small Bump − YEA  
SN74LVC1G02YEAR  
NanoFree− WCSP (DSBGA)  
0.17-mm Small Bump − YZA (Pb-free)  
SN74LVC1G02YZAR  
SN74LVC1G02YEPR  
SN74LVC1G02YZPR  
Reel of 3000  
_ _ _CB_  
NanoStar− WCSP (DSBGA)  
0.23-mm Large Bump − YEP  
NanoFree− WCSP (DSBGA)  
0.23-mm Large Bump − YZP (Pb-free)  
−40°C to 85°C  
Reel of 3000  
Reel of 250  
Reel of 3000  
Reel of 250  
Reel of 4000  
SN74LVC1G02DBVR  
SN74LVC1G02DBVT  
SN74LVC1G02DCKR  
SN74LVC1G02DCKT  
SN74LVC1G02DRLR  
SOT (SOT-23) − DBV  
C02_  
SOT (SC-70) − DCK  
CB_  
CB_  
SOT (SOT-553) − DRL  
†
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.  
YEA/YZA,YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code,  
and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition  
(1 = SnPb, • = Pb-free).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoStar and NanoFree are trademarks of Texas Instruments.  
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Copyright 2005, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...16

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