SN74LVC16244A-EP
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCAS740A–DECEMBER 2003–REVISED JUNE 2005
FEATURES
DGG PACKAGE
(TOP VIEW)
•
Controlled Baseline
– One Assembly/Test Site, One Fabrication
Site
1
48 2OE
47 1A1
1OE
1Y1
1Y2
GND
1Y3
1Y4
2
•
Enhanced Diminishing Manufacturing
Sources (DMS) Support
3
46
1A2
4
45 GND
44 1A3
43 1A4
•
•
•
Enhanced Product-Change Notification
5
(1)
Qualification Pedigree
6
Member of the Texas Instruments Widebus™
Family
7
42
41
40
39
V
CC
V
CC
8
2A1
2A2
GND
2Y1
2Y2
GND
2Y3
2Y4
3Y1
3Y2
GND
3Y3
3Y4
9
•
•
•
•
Operates From 1.65 V to 3.6 V
Inputs Accept Voltages to 5.5 V
Max tpd of 4.1 ns at 3.3 V
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
38 2A3
37 2A4
36 3A1
Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
35
34
33
32
31
30
29
28
27
26
25
3A2
GND
3A3
3A4
•
•
•
Typical VOHV (Output VOH Undershoot)
>2 V at VCC = 3.3 V, TA = 25°C
Ioff Supports Partial-Power-Down Mode
Operation
V
CC
V
CC
4A1
4A2
GND
4A3
4A4
3OE
4Y1
4Y2
GND
4Y3
4Y4
4OE
Supports Mixed-Mode Signal Operation On All
Ports (5-V Input/Output Voltage With 3.3-V
VCC
)
•
•
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 1000-V Charged-Device Model (C101)
(1) Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
DESCRIPTION/ORDERING INFORMATION
This 16-bit buffer/driver is designed for 1.65-V to 3.6-V VCC operation.
The SN74LVC16244A is designed specifically to improve the performance and density of 3-state memory
address drivers, clock drivers, and bus-oriented receivers and transmitters.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
–40°C to 85°C
TSSOP – DGG
Tape and reel
CLVC16244AIDGGREP
C16244AEP
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2003–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
On products compliant to MIL-PRF-38535, all parameters are
Instruments standard warranty. Production processing does not
tested unless otherwise noted. On all other products, production
necessarily include testing of all parameters.
processing does not necessarily include testing of all parameters.