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SN74LVC126APW PDF预览

SN74LVC126APW

更新时间: 2024-11-03 23:09:43
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8页 124K
描述
QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS

SN74LVC126APW 数据手册

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SN74LVC126A  
QUADRUPLE BUS BUFFER GATE  
WITH 3-STATE OUTPUTS  
SCAS339H – MARCH 1994 – REVISED OCTOBER 1998  
D, DB, DGV, OR PW PACKAGE  
(TOP VIEW)  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
1OE  
1A  
V
CC  
4OE  
4A  
1
2
3
4
5
6
7
14  
13  
12  
11  
1Y  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
2OE  
2A  
4Y  
10 3OE  
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
9
8
2Y  
3A  
3Y  
OLP  
= 3.3 V, T = 25°C  
CC  
A
GND  
Typical V  
> 2 V at V  
(Output V  
Undershoot)  
OHV  
CC  
OH  
= 3.3 V, T = 25°C  
A
Inputs Accept Voltages to 5.5 V  
Package Options Include Plastic  
Small-Outline (D), Shrink Small-Outline  
(DB), Thin Very Small-Outline (DGV), and  
Thin Shrink Small-Outline (PW) Packages  
description  
This quadruple bus buffer gate is designed for 1.65-V to 3.6-V V  
operation.  
CC  
The SN74LVC126A features independent line drivers with 3-state outputs. Each output is disabled when the  
associated output-enable (OE) input is low.  
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a  
pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of  
the driver.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators  
in a mixed 3.3-V/5-V system environment.  
The SN74LVC126A is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
(each buffer)  
INPUTS  
OUTPUT  
Y
OE  
A
H
L
H
H
L
H
L
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74LVC126APW 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC126APWT TI

完全替代

QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
SN74LVC126APWR TI

完全替代

QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS

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