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SN74LVC125APWLE

更新时间： 2024-11-04 11:47:15

品牌	Logo	应用领域
德州仪器 - TI		输出元件
页数	文件大小	规格书
17页	613K
描述
QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS

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SN74LVC125APWLE 数据手册

SN74LVC125A

QUADRUPLE BUS BUFFER GATE

WITH 3-STATE OUTPUTS

www.ti.com

SCAS290O–JANUARY 1993–REVISED AUGUST 2005

FEATURES

D, DB, NS, OR PW PACKAGE

(TOP VIEW)

•

Operates From 1.65 V to 3.6 V

•

Specified From –40°C to 85°C

and –40°C to 125°C

1OE

4OE

3OE

•

Inputs Accept Voltages to 5.5 V

Max t_pdof 4.8 ns at 3.3 V

2OE

GND

Typical V_OLP(Output Ground Bounce)

<0.8 V at V_CC= 3.3 V, T_A= 25°C

•

Typical V_OHV(Output V_OHUndershoot)

>2 V at V_CC= 3.3 V, T_A= 25°C

RGY PACKAGE

(TOP VIEW)

Latch-Up Performance Exceeds 250 mA Per

JESD 17

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

13 4OE

– 1000-V Charged-Device Model (C101)

2OE

3OE

DESCRIPTION/ORDERING INFORMATION

This quadruple bus buffer gate is designed for 1.65-V to 3.6-V V_CCoperation.

The SN74LVC125A features independent line drivers with 3-state outputs. Each output is disabled when the

associated output-enable (OE) input is high.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CCthrough a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in

a mixed 3.3-V/5-V system environment.

ORDERING INFORMATION

T_A

PACKAGE⁽¹⁾

ORDERABLE PART NUMBER

SN74LVC125ARGYR

SN74LVC125AD

TOP-SIDE MARKING

LC125A

–40°C to 85°C

QFN – RGY

SOIC – D

Reel of 1000

Tube of 50

Reel of 2500

Reel of 250

Reel of 2000

Tube of 90

SN74LVC125ADR

LVC125A

SN74LVC125ADT

SOP – NS

SN74LVC125ANSR

SN74LVC125ADBR

SN74LVC125APW

LVC125A

LC125A

–40°C to 125°C

SSOP – DB

TSSOP – PW

Reel of 2000

Reel of 250

SN74LVC125APWR

SN74LVC125APWT

LC125A

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...17

中文翻译

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与SN74LVC125APWLE相关器件

型号	品牌	获取价格	描述	数据表
SN74LVC125APWR	TI	获取价格	QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
SN74LVC125APWRE4	TI	获取价格	QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
SN74LVC125APWRG3	TI	获取价格	具有三态输出的 4 通道、1.65V 至 3.6V 缓冲器 \| PW \| 14
SN74LVC125APWRG4	TI	获取价格	QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
SN74LVC125APWT	TI	获取价格	QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
SN74LVC125APWTE4	TI	获取价格	QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
SN74LVC125APWTG4	TI	获取价格	QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
SN74LVC125A-Q1	TI	获取价格	QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
SN74LVC125AQDRG4Q1	TI	获取价格	QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
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