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SN74LV4051ANSRG4 PDF预览

SN74LV4051ANSRG4

更新时间: 2024-11-05 05:24:51
品牌 Logo 应用领域
德州仪器 - TI 解复用器开关复用器或开关信号电路光电二极管
页数 文件大小 规格书
21页 691K
描述
8-CHANNEL ANALOG MULTIPLESERS/DEMULTIPLEXERS

SN74LV4051ANSRG4 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:GREEN, PLASTIC, SOP-16针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.78Is Samacsys:N
模拟集成电路 - 其他类型:SINGLE-ENDED MULTIPLEXERJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:10.2 mm
湿度敏感等级:1信道数量:8
功能数量:1端子数量:16
标称断态隔离度:45 dB通态电阻匹配规范:2.1 Ω
最大通态电阻 (Ron):180 Ω最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:3.3 V
认证状态:Not Qualified座面最大高度:2 mm
最大信号电流:0.05 A子类别:Multiplexer or Switches
最大供电电流 (Isup):0.02 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):2.3 V
表面贴装:YES最长断开时间:28 ns
最长接通时间:28 ns技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5.3 mmBase Number Matches:1

SN74LV4051ANSRG4 数据手册

 浏览型号SN74LV4051ANSRG4的Datasheet PDF文件第2页浏览型号SN74LV4051ANSRG4的Datasheet PDF文件第3页浏览型号SN74LV4051ANSRG4的Datasheet PDF文件第4页浏览型号SN74LV4051ANSRG4的Datasheet PDF文件第5页浏览型号SN74LV4051ANSRG4的Datasheet PDF文件第6页浏览型号SN74LV4051ANSRG4的Datasheet PDF文件第7页 
ꢀꢁ ꢂꢃ ꢄꢅꢃ ꢆ ꢂ ꢇ ꢈꢉ ꢀꢁꢊ ꢃꢄꢅ ꢃꢆ ꢂꢇ ꢈ  
ꢋ ꢌꢍꢎꢈ ꢁꢁꢏꢄ ꢈꢁꢈ ꢄꢐ ꢑ ꢒ ꢓꢄꢔ ꢕꢖ ꢄꢏ ꢗꢏꢘꢀ ꢙꢚꢏ ꢒꢓ ꢄꢔ ꢕꢖ ꢄꢏ ꢗꢏ ꢘ ꢀ  
SCLS428H − MAY 1999 − REVISED APRIL 2005  
SN54LV4051A . . . J OR W PACKAGE  
SN74LV4051A . . . D, DB, DGV, N, NS, OR PW PACKAGE  
(TOP VIEW)  
D
D
2-V to 5.5-V V  
Operation  
CC  
Support Mixed-Mode Voltage Operation on  
All Ports  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
Y4  
Y6  
COM  
Y7  
V
CC  
D
D
D
D
D
High On-Off Output-Voltage Ratio  
Low Crosstalk Between Switches  
Individual Switch Controls  
Y2  
Y1  
Y0  
Y3  
A
Extremely Low Input Current  
Y5  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
INH  
GND  
GND  
B
C
D
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
SN74LV4051A . . . RGY PACKAGE  
(TOP VIEW)  
− 1000-V Charged-Device Model (C101)  
description/ordering information  
1
16  
These 8-channel CMOS analog multiplexers/  
Y6  
COM  
Y7  
Y5  
INH  
GND  
15  
14  
13  
12  
11  
10  
2
3
4
5
6
7
Y2  
Y1  
Y0  
Y3  
A
demultiplexers are designed for 2-V to 5.5-V V  
operation.  
CC  
The ’LV4051A devices handle both analog and  
digital signals. Each channel permits signals with  
amplitudes up to 5.5 V (peak) to be transmitted in  
either direction.  
B
8
9
Applications include signal gating, chopping,  
modulation or demodulation (modem), and signal  
multiplexing for analog-to-digital and digital-to-  
analog conversion systems.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP − N  
Tube of 25  
SN74LV4051AN  
SN74LV4051AN  
LW051A  
QFN − RGY  
Reel of 1000  
Tube of 40  
SN74LV4051ARGYR  
SN74LV4051AD  
SOIC − D  
LV4051A  
Reel of 2500  
Reel of 2000  
Reel of 2000  
Tube of 90  
SN74LV4051ADR  
SN74LV4051ANSR  
SN74LV4051ADBR  
SN74LV4051APW  
SN74LV4051APWR  
SN74LV4051APWT  
SN74LV4051ADGVR  
SNJ54LV4051AJ  
SOP − NS  
74LV4051A  
LW051A  
−40°C to 85°C  
SSOP − DB  
Reel of 2000  
Reel of 250  
Reel of 2000  
Tube of 25  
TSSOP − PW  
LW051A  
TVSOP − DGV  
CDIP − J  
LW051A  
SNJ54LV4051AJ  
SNJ54LV4051AW  
−55°C to 125°C  
CFP − W  
Tube of 150  
SNJ54LV4051AW  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2005, Texas Instruments Incorporated  
ꢓ ꢁ ꢄꢏꢀꢀ ꢐ ꢔꢎ ꢏꢘꢛ ꢕꢀ ꢏ ꢁ ꢐꢔꢏꢚ ꢜꢝ ꢞꢟ ꢠꢡꢢ ꢣꢤꢥ ꢦꢜ ꢢꢡ ꢦꢜꢧ ꢞꢦꢟ ꢖꢘ ꢐ ꢚ ꢓ ꢍꢔ ꢕꢐ ꢁ  
ꢞꢦ  
ꢧꢩ  
ꢰꢭ  
ꢪꢧ ꢩ ꢧ ꢤ ꢥ ꢜ ꢥ ꢩ ꢟ ꢭ  
ꢥꢟ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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