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SN74LV4051A-EP

更新时间： 2024-09-15 12:21:51
品牌 Logo 应用领域
德州仪器 - TI 复用器
页数 文件大小 规格书
13页 490K
描述
 8-CHANNEL ANALOG MULTIPLEXER/DEMULTIPLEXER

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SN74LV4051A-EP 数据手册

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SCLS501D − MAY 2003 − REVISED MAY 2004  
D
Controlled Baseline  
− One Assembly/Test Site, One Fabrication  
Site  
D
Individual Switch Controls  
Extremely Low Input Current  
D
D
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
D
D
Extended Temperature Performance of  
−40°C to 105°C  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
D
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
D
D
D
D
Enhanced Product-Change Notification  
− 1000-V Charged-Device Model (C101)  
†
Qualification Pedigree  
D, DW, OR PW PACKAGE  
(TOP VIEW)  
2-V to 5.5-V V  
Operation  
CC  
Supports Mixed-Mode Voltage Operation on  
All Ports  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
Y4  
Y6  
COM  
Y7  
V
CC  
D
High On-Off Output-Voltage Ratio  
Low Crosstalk Between Switches  
Y2  
Y1  
Y0  
Y3  
A
D
†
Component qualification in accordance with JEDEC and industry  
standards to ensure reliable operation over an extended  
temperature range. This includes, but is not limited to, Highly  
Accelerated Stress Test (HAST) or biased 85/85, temperature  
cycle, autoclave or unbiased HAST, electromigration, bond  
intermetallic life, and mold compound life. Such qualification  
testing should not be viewed as justifying use of this component  
beyond specified performance and environmental limits.  
Y5  
INH  
GND  
GND  
B
C
description/ordering information  
This 8-channel CMOS analog multiplexer/demultiplexer is designed for 2-V to 5.5-V V  
operation.  
CC  
The SN74LV4051A handles both analog and digital signals. Each channel permits signals with amplitudes up  
to 5.5 V (peak) to be transmitted in either direction.  
Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for  
analog-to-digital and digital-to-analog conversion systems.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
‡
PACKAGE  
T
A
SOIC − D  
Tape and reel SN74LV4051ATDREP  
Tape and reel SN74LV4051ATDWREP  
LV4051ATEP  
LV4051ATEP  
L4051EP  
§
−40°C to 105°C  
SOIC − DW  
TSSOP − PW Tape and reel SN74LV4051ATPWREP  
‡
§
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
Product Preview.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
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Copyright 2004, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...13

中文翻译

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SN74LV4051A-EP 替代型号

型号 品牌 替代类型 描述 数据表
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