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SN74LV4046ANE4

更新时间： 2024-09-16 11:49:11
品牌 Logo 应用领域
德州仪器 - TI 信号电路锁相环或频率合成电路光电二极管
页数 文件大小 规格书
15页 502K
描述
HIGH-SPEED CMOS LOGIC PHASE-LOCKED LOOP WITH VCO

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中文翻译

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SN74LV4046ANE4 技术参数

是否Rohs认证：符合生命周期：Active
零件包装代码：DIP包装说明：DIP-16
针数：16Reach Compliance Code：compliant
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：5.41Is Samacsys：N
模拟集成电路 - 其他类型：PHASE LOCKED LOOPJESD-30 代码：R-PDIP-T16
JESD-609代码：e4长度：19.3 mm
功能数量：1端子数量：16
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：DIP
封装等效代码：DIP16,.3封装形状：RECTANGULAR
封装形式：IN-LINE峰值回流温度（摄氏度）：NOT SPECIFIED
电源：3.3/5 V认证状态：Not Qualified
座面最大高度：3.9 mm子类别：PLL or Frequency Synthesis Circuits
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：3.6 V表面贴装：NO
技术：CMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：6.35 mm
Base Number Matches：1

SN74LV4046ANE4 数据手册

 浏览型号SN74LV4046ANE4的Datasheet PDF文件第2页浏览型号SN74LV4046ANE4的Datasheet PDF文件第3页浏览型号SN74LV4046ANE4的Datasheet PDF文件第4页浏览型号SN74LV4046ANE4的Datasheet PDF文件第5页浏览型号SN74LV4046ANE4的Datasheet PDF文件第6页浏览型号SN74LV4046ANE4的Datasheet PDF文件第7页 
SN74LV4046A  
HIGH-SPEED CMOS LOGIC PHASE-LOCKED LOOP  
WITH VCO  
www.ti.com  
SCES656C–FEBRUARY 2006–REVISED APRIL 2007  
FEATURES  
•
Choice of Three Phase Comparators  
•
ESD Protection Exceeds JESD 22  
–
–
–
Exclusive OR  
–
–
–
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
Edge-Triggered J-K Flip-Flop  
Edge-Triggered RS Flip-Flop  
1000-V Charged-Device Model (C101)  
•
•
Excellent VCO Frequency Linearity  
D, DGV, NS, OR PW PACKAGE  
(TOP VIEW)  
VCO-Inhibit Control for ON/OFF Keying and  
for Low Standby Power Consumption  
V
PCP  
PC1  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC  
OUT  
•
•
•
Optimized Power-Supply Voltage Range From  
3 V to 5.5 V  
PC3  
SIG  
OUT  
OUT  
OUT  
COMP  
VCO  
IN  
IN  
Wide Operating Temperature Range . . . –40°C  
to 125°C  
PC2  
OUT  
R
INH  
2
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
R
C1  
1
A
DEM  
VCO  
C1  
OUT  
B
GND  
IN  
DESCRIPTION/ORDERING INFORMATION  
The SN74LV4046A is a high-speed silicon-gate CMOS device that is pin compatible with the CD4046B and the  
CD74HC4046. The device is specified in compliance with JEDEC Std 7.  
The SN74LV4046A is a phase-locked loop (PLL) circuit that contains a linear voltage-controlled oscillator (VCO)  
and three different phase comparators (PC1, PC2, and PC3). A signal input and a comparator input are common  
to each comparator.  
The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to  
small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input  
amplifiers. With a passive low-pass filter, the SN74LV4046A forms a second-order loop PLL. The excellent VCO  
linearity is achieved by the use of linear operational amplifier techniques.  
ORDERING INFORMATION(1)  
TA  
PACKAGE  
Tube of 50  
Reel of 2000  
Tube of 40  
Reel of 2500  
Tube of 90  
Reel of 2000  
Reel of 2000  
ORDERABLE PART NUMBER  
SN74LV4046ANS  
TOP-SIDE MARKING  
SOP – NS  
SOIC – D  
74LV4046A  
SN74LV4046ANSR  
SN74LV4046AD  
LV4046A  
–40°C to 125°C  
SN74LV4046ADR  
SN74LV4046APW  
SN74LV4046APWR  
SN74LV4046ADGVR  
TSSOP – PW  
TVSOP – DGV  
LW046A  
LW046A  
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
website at www.ti.com.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2006–2007, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...15

中文翻译

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SN74LV4046ANE4 替代型号

型号 品牌 替代类型 描述 数据表
SN74LV4046AN TI

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