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SN74LV4046A PDF预览

SN74LV4046A

更新时间： 2024-01-29 09:07:08
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
12页 297K
描述
HIGH-SPEED CMOS LOGIC PHASE-LOCKED LOOP WITH VCO

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SN74LV4046A 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：TSSOP
包装说明：TSSOP-16针数：16
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：6 weeks
风险等级：1.23Samacsys Confidence：1
Samacsys Status：ReleasedSamacsys PartID：754562
Samacsys Pin Count：16Samacsys Part Category：Integrated Circuit
Samacsys Package Category：Small Outline PackagesSamacsys Footprint Name：PW (R-PDSO-G16)
Samacsys Released Date：2018-07-17 14:03:59Is Samacsys：N
模拟集成电路 - 其他类型：PHASE LOCKED LOOPJESD-30 代码：R-PDSO-G16
JESD-609代码：e4长度：5 mm
湿度敏感等级：1功能数量：1
端子数量：16最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP16,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：260电源：3.3/5 V
认证状态：Not Qualified座面最大高度：1 mm
子类别：PLL or Frequency Synthesis Circuits最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：3 V标称供电电压 (Vsup)：3.6 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：4.4 mmBase Number Matches：1

SN74LV4046A 数据手册

 浏览型号SN74LV4046A的Datasheet PDF文件第2页浏览型号SN74LV4046A的Datasheet PDF文件第3页浏览型号SN74LV4046A的Datasheet PDF文件第4页浏览型号SN74LV4046A的Datasheet PDF文件第5页浏览型号SN74LV4046A的Datasheet PDF文件第6页浏览型号SN74LV4046A的Datasheet PDF文件第7页 
SN74LV4046A  
HIGH-SPEED CMOS LOGIC PHASE-LOCKED LOOP  
WITH VCO  
www.ti.com  
SCES656A–FEBRUARY 2006–REVISED FEBRUARY 2006  
FEATURES  
•
Choice of Three Phase Comparators  
– Exclusive OR  
D, DGV, NS, OR PW PACKAGE  
(TOP VIEW)  
– Edge-Triggered J-K Flip-Flop  
– Edge-Triggered RS Flip-Flop  
Excellent VCO Frequency Linearity  
V
PCP  
PC1  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC  
OUT  
PC3  
SIG  
OUT  
OUT  
OUT  
•
•
COMP  
VCO  
IN  
IN  
VCO-Inhibit Control for ON/OFF Keying and  
for Low Standby Power Consumption  
PC2  
OUT  
R
INH  
2
R
•
•
•
•
Optimized Power-Supply Voltage Range From  
3 V to 5.5 V  
C1  
1
A
DEM  
VCO  
C1  
OUT  
B
GND  
Wide Operating Temperature Range . . . –40°C  
to 125°C  
IN  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
– 1000-V Charged-Device Model (C101)  
DESCRIPTION  
The SN74LV4046A is a high-speed silicon-gate CMOS device that is pin compatible with the CD4046B and the  
CD74HC4046. The device is specified in compliance with JEDEC Std 7.  
The SN74LV4046A is a phase-locked-loop circuit that contains a linear voltage-controlled oscillator (VCO) and  
three different phase comparators (PC1, PC2, and PC3). A signal input and a comparator input are common to  
each comparator.  
The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to  
small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input  
amplifiers. With a passive low-pass filter, the SN74LV4046A forms a second-order loop PLL. The excellent VCO  
linearity is achieved by the use of linear operational amplifier techniques.  
ORDERING INFORMATION  
TA  
PACKAGE  
ORDERABLE PART NUMBER  
SN74LV4040ANS  
TOP-SIDE MARKING  
74LV4046A  
SOP – NS  
SOIC – D  
SN74LV4040ANSR  
SN74LV4040AD  
LV4046A  
–40°C to 125°C  
SN74LV4040ADR  
SN74LV4040APW  
SN74LV4040APWR  
SN74LV4040ADGVR  
TSSOP – PW  
TVSOP – DGV  
LW046A  
LW046A  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2006, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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