5秒后页面跳转
SN74LV374ATPWRQ1 PDF预览

SN74LV374ATPWRQ1

更新时间: 2024-11-14 12:22:31
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器触发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
11页 199K
描述
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

SN74LV374ATPWRQ1 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:ROHS COMPLIANT, PLASTIC, TSSOP-20针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.23Is Samacsys:N
系列:LV/LV-A/LVX/HJESD-30 代码:R-PDSO-G20
长度:6.5 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大频率@ Nom-Sup:50000000 Hz
最大I(ol):0.008 A位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:105 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP20,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TR峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 VProp。Delay @ Nom-Sup:18.5 ns
传播延迟(tpd):18.5 ns认证状态:Not Qualified
筛选级别:AEC-Q100座面最大高度:1.2 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:4.4 mmBase Number Matches:1

SN74LV374ATPWRQ1 数据手册

 浏览型号SN74LV374ATPWRQ1的Datasheet PDF文件第2页浏览型号SN74LV374ATPWRQ1的Datasheet PDF文件第3页浏览型号SN74LV374ATPWRQ1的Datasheet PDF文件第4页浏览型号SN74LV374ATPWRQ1的Datasheet PDF文件第5页浏览型号SN74LV374ATPWRQ1的Datasheet PDF文件第6页浏览型号SN74LV374ATPWRQ1的Datasheet PDF文件第7页 
SN74LV374A-Q1  
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP  
WITH 3-STATE OUTPUTS  
SCLS468C − FEBRUARY 2003 − REVISED JANUARY 2008  
PW PACKAGE  
(TOP VIEW)  
D
D
Qualified for Automotive Applications  
Typical V (Output Ground Bounce)  
OLP  
<0.8 V at V = 3.3 V, T = 25°C  
CC  
A
OE  
1Q  
1D  
2D  
2Q  
3Q  
3D  
4D  
4Q  
VCC  
1
2
3
4
5
6
7
8
9
10  
20  
D
D
D
D
Typical V  
(Output V Undershoot)  
19 8Q  
18 8D  
OHV  
OH  
>2.3 V at V = 3.3 V, T = 25°C  
CC  
A
17  
16  
15  
14  
13  
12  
11  
7D  
7Q  
6Q  
6D  
5D  
5Q  
CLK  
Supports Mixed-Mode Voltage Operation on  
All Ports  
I
off  
Supports Partial-Power-Down Mode  
Operation  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
GND  
− 1000-V Charged-Device Model (C101)  
description/ordering information  
The SN74LV374A is an octal edge-triggered D-type flip-flop designed for 2-V to 5.5-V V operation.  
CC  
This device features 3-state outputs designed specifically for driving highly capacitive or relatively  
low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus  
drivers, and working registers.  
On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D)  
inputs.  
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high  
or low logic levels) or high-impedance state. In the high-impedance state, the outputs neither load nor drive the  
bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines  
without need for interface or pullup components.  
OE does not affect internal operations of the latch. Old data can be retained or new data can be entered while  
the outputs are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION†  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
−40°C to 105°C  
TSSOP − PW Tape and reel  
SN74LV374ATPWRQ1  
LV374ATQ  
For the most current package and ordering information, see the Package Option Addendum at the end of this  
document, or see the TI web site at http://www.ti.com.  
Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright © 2008, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74LV374ATPWRQ1 替代型号

型号 品牌 替代类型 描述 数据表
SN74LV374ATPWRG4Q1 TI

类似代替

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

与SN74LV374ATPWRQ1相关器件

型号 品牌 获取价格 描述 数据表
SN74LV374ATPWT TI

获取价格

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74LV374ATPWTE4 TI

获取价格

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74LV374ATPWTG4 TI

获取价格

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74LV374ATRGYR TI

获取价格

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74LV374ATRGYRG4 TI

获取价格

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74LV374AZQNR TI

获取价格

OCTAL EDGE TRIGGERED D TYPE FLIP FLOPS WITH 3 STATE OUTPUTS
SN74LV374DB TI

获取价格

LV/LV-A/LVX/H SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20
SN74LV374DBLE TI

获取价格

Octal Edge-Triggered D-Type Flip-Flop With 3-State Outputs 20-SSOP -40 to 85
SN74LV374DBR TI

获取价格

LV/LV-A/LVX/H SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, PLASTIC, SSOP-20
SN74LV374DW TI

获取价格

暂无描述