5秒后页面跳转
捷配首页

Datasheet > 逻辑 > 总线驱动器/收发器> SN74LV368APWR
SN74LV368APWR PDF预览

SN74LV368APWR

更新时间： 2024-11-02 06:27:31
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管输出元件逻辑集成电路总线驱动器总线收发器
页数 文件大小 规格书
8页 112K
描述
LV/LV-A/LVX/H SERIES, 6-BIT DRIVER, INVERTED OUTPUT, PDSO16, PLASTIC, TSSOP-16

阅读下载

中文翻译

获取价格

SN74LV368APWR 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：TSSOP包装说明：TSSOP, TSSOP16,.25
针数：16Reach Compliance Code：not_compliant
风险等级：5.92控制类型：ENABLE LOW
系列：LV/LV-A/LVX/HJESD-30 代码：R-PDSO-G16
长度：5 mm负载电容（CL）：50 pF
逻辑集成电路类型：BUS DRIVER最大I（ol）：0.008 A
位数：6功能数量：1
端口数量：2端子数量：16
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：INVERTED
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP16,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法：TAPE AND REEL
峰值回流温度（摄氏度）：NOT SPECIFIED电源：3.3 V
认证状态：Not Qualified座面最大高度：1.2 mm
子类别：Bus Driver/Transceivers最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：2 V标称供电电压 (Vsup)：2.5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：4.4 mm

SN74LV368APWR 数据手册

 浏览型号SN74LV368APWR的Datasheet PDF文件第2页浏览型号SN74LV368APWR的Datasheet PDF文件第3页浏览型号SN74LV368APWR的Datasheet PDF文件第4页浏览型号SN74LV368APWR的Datasheet PDF文件第5页浏览型号SN74LV368APWR的Datasheet PDF文件第6页浏览型号SN74LV368APWR的Datasheet PDF文件第7页 
SN54LV368A, SN74LV368A  
HEX BUFFERS AND LINE DRIVERS  
WITH 3-STATE OUTPUTS  
SCLS406B – APRIL 1998 – REVISED MAY 2000  
SN54LV368A . . . J OR W PACKAGE  
SN74LV368A . . . D, DB, DGV, NS, OR PW PACKAGE  
(TOP VIEW)  
EPIC (Enhanced-Performance Implanted  
CMOS) Process  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
OLP  
CC  
= 3.3 V, T = 25°C  
1OE  
1A1  
1Y1  
1A2  
1Y2  
1A3  
1Y3  
GND  
V
CC  
A
1
2
3
4
5
6
7
8
16  
15  
14  
13  
2OE  
2A2  
2Y2  
Typical V  
>2.3 V at V  
(Output V  
Undershoot)  
OHV  
CC  
OH  
= 3.3 V, T = 25°C  
A
2-V to 5.5-V V  
Operation  
CC  
12 2A1  
Support Mixed-Mode Voltage Operation on  
All Ports  
11  
10  
9
2Y1  
1A4  
1Y4  
Inverting Outputs  
Package Options Include Plastic  
Small-Outline (D, NS), Shrink Small-Outline  
(DB), Thin Very Small-Outline (DGV), and  
Thin Shrink Small-Outline (PW) Packages,  
Ceramic Flat (W) Packages, Chip Carriers  
(FK), and DIPs (J)  
SN54LV368A . . . FK PACKAGE  
(TOP VIEW)  
3
2
1
20 19  
18  
2A2  
2Y2  
NC  
description  
1Y1  
1A2  
NC  
4
5
6
7
8
17  
16  
The ’LV368A devices are hex buffers and line  
drivers designed for 2-V to 5.5-V V operation.  
These devices are designed specifically to  
improve both the performance and density of  
3-state memory address drivers, clock drivers,  
and bus-oriented receivers and transmitters.  
CC  
15 2A1  
14  
9 10 11 12 13  
1Y2  
1A3  
2Y1  
The ’LV368A devices are organized as dual 4-line  
and 2-line buffers/drivers with active-low  
output-enable (1OE and 2OE) inputs. When OE is  
low, the device passes inverted data from the  
A inputs to the Y outputs. When OE is high, the  
outputs are in the high-impedance state.  
NC – No internal connection  
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a  
pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the  
driver.  
The SN54LV368A is characterized for operation over the full military temperature range of –55°C to 125°C. The  
SN74LV368A is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
(each buffer/driver)  
INPUTS  
OUTPUT  
Y
OE  
A
X
H
L
H
L
L
Z
H
L
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments.  
Copyright 2000, Texas Instruments Incorporated  
PRODUCT PREVIEW information concerns products in the formative or  
design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right to  
change or discontinue these products without notice.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
12345678

中文翻译

下载PDF

与SN74LV368APWR相关器件

型号 品牌 获取价格 描述 数据表
SN74LV373 TI

获取价格

 		OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN74LV373A TI

获取价格

 		OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN74LV373A_07 TI

获取价格

 		OCTAL TRANSPARENT D-TYPE LATCHES WITH 3 STATE OUTPUTS
SN74LV373ADB TI

获取价格

 		OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN74LV373ADBLE TI

获取价格

 		暂无描述
SN74LV373ADBR TI

获取价格

 		OCTAL TRANSPARENT D-TYPE LATCHES WITH 3 STATE OUTPUTS
SN74LV373ADBRE4 TI

获取价格

 		OCTAL TRANSPARENT D-TYPE LATCHES WITH 3 STATE OUTPUTS
SN74LV373ADBRG4 TI

获取价格

 		OCTAL TRANSPARENT D-TYPE LATCHES WITH 3 STATE OUTPUTS
SN74LV373ADGV TI

获取价格

 		OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN74LV373ADGVR TI

获取价格

 		OCTAL TRANSPARENT D-TYPE LATCHES WITH 3 STATE OUTPUTS

与SN74LV368APWR相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证