Datasheet > 逻辑 > 总线驱动器/收发器> SN74LV368ANSR

SN74LV368ANSR

更新时间： 2024-11-06 07:33:07

品牌	Logo	应用领域
德州仪器 - TI		驱动光电二极管输出元件总线驱动器总线收发器
页数	文件大小	规格书
8页	112K
描述
LV/LV-A/LVX/H SERIES, 6-BIT DRIVER, INVERTED OUTPUT, PDSO16, PLASTIC, SOP-16

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SN74LV368ANSR 数据手册

SN54LV368A, SN74LV368A

HEX BUFFERS AND LINE DRIVERS

WITH 3-STATE OUTPUTS

SCLS406B – APRIL 1998 – REVISED MAY 2000

SN54LV368A . . . J OR W PACKAGE

SN74LV368A . . . D, DB, DGV, NS, OR PW PACKAGE

(TOP VIEW)

EPIC (Enhanced-Performance Implanted

CMOS) Process

Typical V

<0.8 V at V

(Output Ground Bounce)

OLP

= 3.3 V, T = 25°C

1OE

1A1

1Y1

1A2

1Y2

1A3

1Y3

GND

2OE

2A2

2Y2

Typical V

>2.3 V at V

(Output V

Undershoot)

OHV

= 3.3 V, T = 25°C

2-V to 5.5-V V

Operation

12 2A1

Support Mixed-Mode Voltage Operation on

All Ports

2Y1

1A4

1Y4

Inverting Outputs

Package Options Include Plastic

Small-Outline (D, NS), Shrink Small-Outline

(DB), Thin Very Small-Outline (DGV), and

Thin Shrink Small-Outline (PW) Packages,

Ceramic Flat (W) Packages, Chip Carriers

(FK), and DIPs (J)

SN54LV368A . . . FK PACKAGE

(TOP VIEW)

20 19

2A2

2Y2

description

1Y1

1A2

The ’LV368A devices are hex buffers and line

drivers designed for 2-V to 5.5-V V operation.

These devices are designed specifically to

improve both the performance and density of

3-state memory address drivers, clock drivers,

and bus-oriented receivers and transmitters.

15 2A1

9 10 11 12 13

1Y2

1A3

2Y1

The ’LV368A devices are organized as dual 4-line

and 2-line buffers/drivers with active-low

output-enable (1OE and 2OE) inputs. When OE is

low, the device passes inverted data from the

A inputs to the Y outputs. When OE is high, the

outputs are in the high-impedance state.

NC – No internal connection

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a

pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the

driver.

The SN54LV368A is characterized for operation over the full military temperature range of –55°C to 125°C. The

SN74LV368A is characterized for operation from –40°C to 85°C.

FUNCTION TABLE

(each buffer/driver)

INPUTS

OUTPUT

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC is a trademark of Texas Instruments.

PRODUCT PREVIEW information concerns products in the formative or

design phase of development. Characteristic data and other

specifications are design goals. Texas Instruments reserves the right to

change or discontinue these products without notice.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7 8

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与SN74LV368ANSR相关器件

型号	品牌	获取价格	描述	数据表
SN74LV368APWR	TI	获取价格	LV/LV-A/LVX/H SERIES, 6-BIT DRIVER, INVERTED OUTPUT, PDSO16, PLASTIC, TSSOP-16
SN74LV373	TI	获取价格	OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN74LV373A	TI	获取价格	OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN74LV373A_07	TI	获取价格	OCTAL TRANSPARENT D-TYPE LATCHES WITH 3 STATE OUTPUTS
SN74LV373ADB	TI	获取价格	OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN74LV373ADBLE	TI	获取价格	暂无描述
SN74LV373ADBR	TI	获取价格	OCTAL TRANSPARENT D-TYPE LATCHES WITH 3 STATE OUTPUTS
SN74LV373ADBRE4	TI	获取价格	OCTAL TRANSPARENT D-TYPE LATCHES WITH 3 STATE OUTPUTS
SN74LV373ADBRG4	TI	获取价格	OCTAL TRANSPARENT D-TYPE LATCHES WITH 3 STATE OUTPUTS
SN74LV373ADGV	TI	获取价格	OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

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