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SN74LV273PWR PDF预览

SN74LV273PWR

更新时间: 2024-11-09 13:13:51
品牌 Logo 应用领域
德州仪器 - TI 触发器
页数 文件大小 规格书
17页 513K
描述
LV/LV-A/LVX/H SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20, PLASTIC, TSSOP-20

SN74LV273PWR 技术参数

生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP20,.25针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.15系列:LV/LV-A/LVX/H
JESD-30 代码:R-PDSO-G20长度:6.5 mm
逻辑集成电路类型:D FLIP-FLOP位数:8
功能数量:1端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP20,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟(tpd):26 ns认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
触发器类型:POSITIVE EDGE宽度:4.4 mm
最小 fmax:60 MHzBase Number Matches:1

SN74LV273PWR 数据手册

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ꢀꢁ ꢂꢃ ꢄꢅꢆ ꢇ ꢈ ꢉꢊ ꢀꢁꢇ ꢃꢄꢅ ꢆꢇ ꢈꢉ  
ꢋ ꢌꢍꢉꢄ ꢎꢏꢍ ꢐꢑ ꢒ ꢓ ꢄ ꢔꢑ ꢏ ꢓꢄꢋ ꢑ ꢀ  
ꢕ ꢔꢍꢖ ꢌ ꢄꢒ ꢉꢗ  
SCLS399J − APRIL 1998 − REVISED APRIL 2005  
D
D
D
D
D
2-V to 5.5-V V  
Operation  
D
D
D
Support Mixed-Mode Voltage Operation on  
All Ports  
CC  
Max t of 10.5 ns at 5 V  
pd  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
OLP  
CC  
= 3.3 V, T = 25°C  
A
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
Typical V  
>2.3 V at V  
(Output V  
Undershoot)  
OHV  
CC  
OH  
= 3.3 V, T = 25°C  
A
I
Supports Partial-Power-Down Mode  
off  
− 1000-V Charged-Device Model (C101)  
Operation  
SN54LV273A . . . J OR W PACKAGE  
SN74LV273A . . . DB, DGV, DW, NS,  
OR PW PACKAGE  
SN74LV273A . . . RGY PACKAGE  
(TOP VIEW)  
SN54LV273A . . . FK PACKAGE  
(TOP VIEW)  
(TOP VIEW)  
1
20  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
CLR  
1Q  
1D  
2D  
2Q  
3Q  
3D  
4D  
4Q  
V
CC  
3
2
1
20 19  
18  
1Q  
1D  
2D  
2Q  
3Q  
3D  
4D  
4Q  
19 8Q  
2
3
4
5
6
7
8
9
2D  
2Q  
3Q  
3D  
4D  
8D  
17 7D  
4
5
6
7
8
8Q  
8D  
7D  
7Q  
6Q  
6D  
5D  
5Q  
CLK  
18  
17  
16  
15  
14  
13  
12  
8D  
7D  
7Q  
6Q  
6D  
5D  
5Q  
16  
15  
14  
7Q  
6Q  
6D  
9 10 11 12 13  
10  
11  
GND  
description/ordering information  
The ’LV273A devices are octal D-type flip-flops designed for 2-V to 5.5-V V  
operation.  
CC  
ORDERING INFORMATION  
ORDERABLE  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PART NUMBER  
SN74LV273ARGYR  
SN74LV273ADW  
SN74LV273ADWR  
SN74LV273ANSR  
SN74LV273ADBR  
SN74LV273APW  
SN74LV273APWR  
SN74LV273APWT  
SN74LV273ADGVR  
SNJ54LV273AJ  
QFN − RGY  
SOIC − DW  
Reel of 1000  
Tube of 25  
LV273A  
LV273A  
LV273A  
74LV273A  
LV273A  
Reel of 2000  
Reel of 2000  
Reel of 2000  
Tube of 70  
SOP − NS  
SSOP − DB  
−40°C to 85°C  
Reel of 2000  
Reel of 250  
Reel of 2000  
Tube of 20  
TSSOP − PW  
LV273A  
TVSOP − DGV  
CDIP − J  
LV273A  
SNJ54LV273AJ  
SNJ54LV273AW  
SNJ54LV273AFK  
CFP − W  
Tube of 85  
SNJ54LV273AW  
SNJ54LV273AFK  
−55°C to 125°C  
LCCC − FK  
Tube of 55  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2005, Texas Instruments Incorporated  
ꢘ ꢁ ꢄꢒꢀꢀ ꢋ ꢍꢖ ꢒꢗꢕ ꢔꢀ ꢒ ꢁ ꢋꢍꢒꢎ ꢙꢚ ꢛꢜ ꢝꢞꢟ ꢠꢡꢢ ꢣꢙ ꢟꢞ ꢣꢙꢤ ꢛꢣꢜ ꢑꢗ ꢋ ꢎ ꢘ ꢌꢍ ꢔꢋ ꢁ  
ꢧꢤ ꢦ ꢤ ꢡ ꢢ ꢙ ꢢ ꢦ ꢜ ꢪ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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