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SN74LV244DBLE PDF预览

SN74LV244DBLE

更新时间: 2024-11-29 01:08:11
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德州仪器 - TI 驱动输出元件
页数 文件大小 规格书
10页 223K
描述
OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

SN74LV244DBLE 数据手册

 浏览型号SN74LV244DBLE的Datasheet PDF文件第2页浏览型号SN74LV244DBLE的Datasheet PDF文件第3页浏览型号SN74LV244DBLE的Datasheet PDF文件第4页浏览型号SN74LV244DBLE的Datasheet PDF文件第5页浏览型号SN74LV244DBLE的Datasheet PDF文件第6页浏览型号SN74LV244DBLE的Datasheet PDF文件第7页 
ꢉ ꢊꢋꢌꢄ ꢍꢎꢏ ꢏ ꢐꢑꢀꢒ ꢓ ꢑꢔ ꢅ ꢐꢑ  
ꢕ ꢔꢋ ꢖ ꢗ ꢘꢀꢋꢌꢋ ꢐ ꢉ ꢎꢋ ꢙ ꢎꢋ  
SCLS194C − FEBRUARY 1993 − REVISED APRIL 1996  
SN54LV244 . . . J OR W PACKAGE  
SN74LV244 . . . DB, DW, OR PW PACKAGE  
(TOP VIEW)  
D EPIC (Enhanced-Performance Implanted  
CMOS) 2-µ Process  
D Typical V  
(Output Ground Bounce)  
OLP  
< 0.8 V at V , T = 25°C  
CC  
A
1OE  
1A1  
2Y4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2Y1  
GND  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
D Typical V  
(Output V  
Undershoot)  
2OE  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
OHV  
CC  
OH  
> 2 V at V , T = 25°C  
A
D ESD Protection Exceeds 2000 V Per  
MIL-STD-883C, Method 3015; Exceeds  
200 V Using Machine Model  
(C = 200 pF, R = 0)  
13 2A2  
12 1Y4  
D Latch-Up Performance Exceeds 250 mA  
Per JEDEC Standard JESD-17  
11  
2A1  
D
Package Options Include Plastic  
Small-Outline (DW), Shrink Small-Outline  
(DB), Thin Shrink Small-Outline (PW),  
Ceramic Flat (W) Packages, Chip Carriers  
(FK), and (J) 300-mil DIPs  
SN54LV244 . . . FK PACKAGE  
(TOP VIEW)  
description  
3
2
1
20 19  
18  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
1A2  
2Y3  
1A3  
2Y2  
1A4  
4
5
6
7
8
These octal buffers/line drivers are designed for  
2.7-V to 5.5-V V operation.  
17  
16  
15  
14  
CC  
The ’LV244 are designed specifically to improve  
both the performance and density of 3-state  
memory address drivers, clock drivers, and  
bus-oriented receivers and transmitters.  
9 10 11 12 13  
The ’LV244 are organized as two 4-bit line drivers  
with separate output-enable (OE) inputs. When  
OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the  
high-impedance state.  
The SN74LV244 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count  
and functionality of standard small-outline packages in less than half the printed-circuit-board area.  
The SN54LV244 is characterized for operation over the full military temperature range of −55°C to 125°C. The  
SN74LV244 is characterized for operation from −40°C to 85°C.  
FUNCTION TABLE  
(each buffer)  
INPUTS  
OUTPUT  
Y
OE  
A
H
L
L
L
H
L
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1996, Texas Instruments Incorporated  
ꢎ ꢁ ꢄꢐꢀꢀ ꢉ ꢋꢖ ꢐꢑꢕ ꢔꢀ ꢐ ꢁ ꢉꢋꢐꢓ ꢚꢛ ꢜꢝ ꢞꢟꢠ ꢡꢢꢣ ꢤꢚ ꢠꢟ ꢤꢚꢥ ꢜꢤꢝ ꢙꢑ ꢉ ꢓ ꢎ ꢊꢋ ꢔꢉ ꢁ  
ꢨꢥ ꢧ ꢥ ꢢ ꢣ ꢚ ꢣ ꢧ ꢝ ꢫ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  

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