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SN74LV244ATDGVRE4 PDF预览

SN74LV244ATDGVRE4

更新时间: 2024-01-09 23:19:30
品牌 Logo 应用领域
德州仪器 - TI 驱动器输出元件
页数 文件大小 规格书
17页 574K
描述
OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

SN74LV244ATDGVRE4 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:TSSOP, TSSOP20,.25,16
针数:20Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.78
控制类型:ENABLE LOW系列:LV/LV-A/LVX/H
JESD-30 代码:R-PDSO-G20长度:5 mm
逻辑集成电路类型:BUS DRIVER最大I(ol):0.016 A
位数:4功能数量:2
端口数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP20,.25,16封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TR
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
Prop。Delay @ Nom-Sup:9.5 ns传播延迟(tpd):9.5 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.4 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

SN74LV244ATDGVRE4 数据手册

 浏览型号SN74LV244ATDGVRE4的Datasheet PDF文件第2页浏览型号SN74LV244ATDGVRE4的Datasheet PDF文件第3页浏览型号SN74LV244ATDGVRE4的Datasheet PDF文件第4页浏览型号SN74LV244ATDGVRE4的Datasheet PDF文件第5页浏览型号SN74LV244ATDGVRE4的Datasheet PDF文件第6页浏览型号SN74LV244ATDGVRE4的Datasheet PDF文件第7页 
SN74LV244AT  
OCTAL BUFFER/DRIVER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES572CJUNE 2004REVISED AUGUST 2005  
FEATURES  
Inputs Are TTL-Voltage Compatible  
4.5-V to 5.5-V VCC Operation  
Typical tpd = 5.4 ns at 5 V  
Ioff Supports Partial-Power-Down Mode  
Operation  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
Typical VOLP (Output Ground Bounce)  
<0.8 V at VCC = 5 V, TA = 25°C  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
Typical VOHV (Output VOH Undershoot)  
>2.3 V at VCC = 5 V, TA = 25°C  
Supports Mixed-Mode Voltage Operation on  
All Ports  
– 1000-V Charged-Device Model (C101)  
RGY PACKAGE  
(TOP VIEW)  
DB, DGV, DW, NS, OR PW PACKAGE  
(TOP VIEW)  
1OE  
1A1  
2Y4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2Y1  
GND  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
2OE  
1Y1  
2A4  
1
20  
19  
18  
17  
16  
15  
14  
13  
12  
2
3
4
5
6
7
8
9
1A1  
2Y4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2Y1  
2OE  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
2A2  
1Y4  
16 1Y2  
15 2A3  
14  
13  
12  
11  
1Y3  
2A2  
1Y4  
2A1  
10  
11  
DESCRIPTION/ORDERING INFORMATION  
This octal buffer/driver is designed specifically to improve both the performance and density of 3-state  
memory-address drivers, clock drivers, and bus-oriented receivers and transmitters.  
The SN74LV244AT is organized as two 4-bit buffers/line drivers with separate output-enable (OE) inputs. When  
OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the  
high-impedance state.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN74LV244ATRGYR  
SN74LV244ATDW  
TOP-SIDE MARKING  
VV244  
QFN – RGY  
SOIC – DW  
Reel of 1000  
Tube of 25  
LV244AT  
Reel of 2000  
Reel of 2000  
Reel of 2000  
Tube of 70  
SN74LV244ATDWR  
SN74LV244ATNSR  
SN74LV244ATDBR  
SN74LV244ATPW  
SOP – NS  
74LV244AT  
LV244AT  
–40°C to 85°C  
SSOP – DB  
TSSOP – PW  
TVSOP – DGV  
Reel of 2000  
Reel of 250  
Reel of 2000  
SN74LV244ATPWR  
SN74LV244ATPWT  
SN74LV244ATDGVR  
LV244AT  
LV244AT  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2004–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

SN74LV244ATDGVRE4 替代型号

型号 品牌 替代类型 描述 数据表
SN74LV244ATDGVR TI

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