SN54LV244A, SN74LV244A
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCLS383B – SEPTEMBER 1997 – REVISED JUNE 1998
SN54LV244A . . . J OR W PACKAGE
SN74LV244A . . . DB, DGV, DW, NS, OR PW PACKAGE
(TOP VIEW)
EPIC (Enhanced-Performance Implanted
CMOS) Process
Typical V
< 0.8 V at V , T = 25°C
(Output Ground Bounce)
OLP
CC
A
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
Typical V
> 2 V at V , T = 25°C
(Output V
Undershoot)
2OE
1Y1
2A4
1Y2
2A3
1Y3
OHV
CC
OH
A
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
13 2A2
12 1Y4
Package Options Include Plastic
Small-Outline (DW, NS), Shrink
11
2A1
Small-Outline (DB), Thin Very Small-Outline
(DGV), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Flat (W) Packages, Chip
Carriers (FK), and DIPs (J)
SN54LV244A . . . FK PACKAGE
(TOP VIEW)
description
3
2 1 20 19
18
1Y1
2A4
1Y2
2A3
1Y3
1A2
2Y3
1A3
2Y2
1A4
4
5
6
7
8
These octal buffers/line drivers are designed for
2-V to 5.5-V V operation.
17
16
15
14
CC
The ’LV244A devices are designed specifically to
improve both the performance and density of
3-state memory address drivers, clock drivers,
and bus-oriented receivers and transmitters.
9 10 11 12 13
These devices are organized as two 4-bit line
drivers with separate output-enable (OE) inputs.
When OE is low, the device passes data from the
A inputs to the Y outputs. When OE is high, the
outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup
CC
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54LV244A is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74LV244A is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each buffer)
INPUTS
OUTPUT
Y
OE
A
H
L
L
L
H
L
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1998, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265