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SN74LV1T04DCKRG4 PDF预览

SN74LV1T04DCKRG4

更新时间: 2023-06-19 15:25:30
品牌 Logo 应用领域
德州仪器 - TI 转换器电平转换器栅极
页数 文件大小 规格书
16页 848K
描述
单电源反相门逻辑电平转换器 | DCK | 5

SN74LV1T04DCKRG4 数据手册

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SN74LV1T04  
www.ti.com  
SCLS738A SEPTEMBER 2013REVISED SEPTEMBER 2013  
Single Power Supply Inverter Gate CMOS Logic Level Shifter  
Check for Samples: SN74LV1T04  
1
FEATURES  
DESCRIPTION  
SN74LV1T04 is Low Voltage CMOS gate logic and  
operates in wider voltage range for portable  
equipment and battery back-up equipment. All output  
logic level is a compatible CMOS Logic level with  
referring to the supply VCC which enable to output  
3.3V and 5V CMOS Output.  
Single-Supply Voltage Translator at  
5.0/3.3/2.5/1.8V  
Operating Range of 1.8V to 5.5V  
Up Translation Mode  
1.2V(1) to 1.8V at 1.8V VCC  
1.5V(1) to 2.5V at 2.5V VCC  
1.8V(1) to 3.3V at 3.3V VCC  
3.3V to 5.0V at 5.0V VCC  
The input is designed with lower threshold circuit to  
match 1.8V Input Logic at VCC = 3.3V and can be  
used in 1.8V to 3.3V Level Up Translator functions. In  
addition, the 5V Input tolerant on input pins enable  
the chip to configure Down Translation as 3.3V to  
2.5V Output at VCC = 2.5V. The wide VCC range of  
1.8V to 5.5V allows the possibility of desired  
switching output level to connect the controllers or  
processors.  
Down Translation Mode  
3.3V to 1.8V at 1.8V VCC  
3.3V to 2.5V at 2.5V VCC  
5.0V to 3.3V at 3.3V VCC  
Logic Output is referring to supply VCC  
Optimized the output driving  
The SN74LV1T04 is designed with optimized current-  
drive capability of 8 mA to reduce line reflections,  
overshoot, and undershoot caused by high-drive  
outputs.  
8mA Output Drive at 5V  
7mA Output Drive at 3.3V  
3mA Output Drive at 1.8V  
DCK or DBV PACKAGE  
(TOP VIEW)  
Unique Direction Translation-Up  
Characterized up to 50MHz at 3.3V VCC  
5V Tolerance on Input Pins  
VCC  
1
2
3
5
4
NC  
A
–40°C to 125°C Operating Temperature Range  
Pb-Free Packages Available: SC-70 (DCK)  
2 × 2.1 × 0.65 mm (Height 1.1mm)  
Y
GND  
Latch-Up Performance Exceeds 250mA Per  
JESD 17  
ESD Performance Tested Per JESD 22  
2000-V Human-Body Model (A114-B,  
Class II)  
200-V Machine Model (A115-A)  
1000-V Charged-Device Model (C101)  
Enable the standard gate function and drop-in  
replacement  
Backward output compatible with AUP1G,  
LVC1G  
(1)  
Refer the VIH/VIL and output drive for lower VCC condition.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2013, Texas Instruments Incorporated  

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