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SN74LV08A-EP PDF预览

SN74LV08A-EP

更新时间： 2024-11-04 11:58:31
品牌 Logo 应用领域
德州仪器 - TI 输入元件
页数 文件大小 规格书
9页 414K
描述
QUADRUPLE 2-INPUT POSITIVE-AND GATE

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SN74LV08A-EP 数据手册

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SN74LV08A-EP  
QUADRUPLE 2-INPUT POSITIVE-AND GATE  
www.ti.com  
SCLS481B–MAY 2003–REVISED JANUARY 2006  
FEATURES  
•
Controlled Baseline  
•
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
– One Assembly/Test Site, One Fabrication  
Site  
•
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
•
•
Extended Temperature Performance of  
–55°C to 125°C  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
– 1000-V Charged-Device Model (C101)  
PW PACKAGE  
(TOP VIEW)  
•
•
•
Enhanced Product-Change Notification  
(1)  
Qualification Pedigree  
1A  
1B  
V
CC  
Typical VOLP (Output Ground Bounce)  
<0.8 V at VCC = 3.3 V, TA = 25°C  
1
2
3
4
5
6
7
14  
13  
12  
11  
4B  
4A  
4Y  
1Y  
•
•
•
Typical VOHV (Output VOH Undershoot)  
>2.3 V at VCC = 3.3 V, TA = 25°C  
2A  
2B  
10 3B  
Supports Mixed-Mode Voltage Operation on  
All Ports  
9
8
2Y  
3A  
3Y  
GND  
Ioff Supports Partial-Power-Down Mode  
Operation  
(1) Component qualification in accordance with JEDEC and  
industry standards to ensure reliable operation over an  
extended temperature range. This includes, but is not limited  
to, Highly Accelerated Stress Test (HAST) or biased 85/85,  
temperature cycle, autoclave or unbiased HAST,  
electromigration, bond intermetallic life, and mold compound  
life. Such qualification testing should not be viewed as  
justifying use of this component beyond specified  
performance and environmental limits.  
DESCRIPTION/ORDERING INFORMATION  
This quadruple 2-input positive-AND gate is designed for 2-V to 5.5-V VCC operation.  
Y = A S B or Y = A + B  
The SN74LV08A-EP performs the Boolean function  
in positive logic.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
Tape and reel  
Tape and reel  
ORDERABLE PART NUMBER  
SN74LV08ATPWREP  
TOP-SIDE MARKING  
LV08AEP  
LV08AEP  
–40°C to 105°C  
–55°C to 125°C  
TSSOP – PW  
TSSOP – PW  
SN74LV08AMPWREP  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
FUNCTION TABLE  
(EACH GATE)  
INPUTS  
OUTPUT  
Y
A
H
L
B
H
X
L
H
L
L
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2003–2006, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...9

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