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SN74LS298JDS PDF预览

SN74LS298JDS

更新时间: 2024-11-06 13:13:51
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 解复用器存储逻辑集成电路光电二极管输入元件
页数 文件大小 规格书
6页 190K
描述
LS SERIES, NEGATIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CDIP16, CERAMIC, DIP-16

SN74LS298JDS 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:DIP, DIP16,.3针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.16Is Samacsys:N
其他特性:FOUR 2:1 MUX FOLLOWED BY REGISTER系列:LS
JESD-30 代码:R-GDIP-T16JESD-609代码:e0
长度:19.495 mm逻辑集成电路类型:MULTIPLEXER
位数:4功能数量:1
输入次数:2端子数量:16
最高工作温度:70 °C最低工作温度:
输出极性:TRUE封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
电源:5 V传播延迟(tpd):32 ns
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:Multiplexer/Demultiplexers最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL触发器类型:NEGATIVE EDGE
宽度:7.62 mmBase Number Matches:1

SN74LS298JDS 数据手册

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SN54/74LS298  
QUAD 2-INPUT MULTIPLEXER  
WITH STORAGE  
The SN54/74LS298 is a Quad 2-Port Register. It is the logical equivalent of  
a quad 2-input multiplexer followed by a quad 4-bit edge-triggered register. A  
Common Select input selects between two 4-bit input ports (data sources.)  
The selected data is transferred to the output register synchronous with the  
HIGH to LOW transition of the Clock input.  
QUAD 2-INPUT MULTIPLEXER  
WITH STORAGE  
LOW POWER SCHOTTKY  
The LS298 is fabricated with the Schottky barrier process for high speed  
and is completely compatible with all Motorola TTL families.  
Select From Two Data Sources  
Fully Edge-Triggered Operation  
Typical Power Dissipation of 65 mW  
Input Clamp Diodes Limit High Speed Termination Effects  
J SUFFIX  
CERAMIC  
CASE 620-09  
16  
1
CONNECTION DIAGRAM DIP (TOP VIEW)  
N SUFFIX  
PLASTIC  
CASE 648-08  
16  
NOTE:  
1
The Flatpak version  
has the same pinouts  
(Connection Diagram) as  
the Dual In-Line Package.  
D SUFFIX  
SOIC  
CASE 751B-03  
16  
1
ORDERING INFORMATION  
PIN NAMES  
LOADING (Note a)  
SN54LSXXXJ  
Ceramic  
SN74LSXXXN Plastic  
SN74LSXXXD SOIC  
HIGH  
LOW  
S
CP  
Common Select Input  
0.5 U.L.  
0.5 U.L.  
0.5 U.L.  
0.5 U.L.  
10 U.L.  
0.25 U.L.  
0.25 U.L.  
0.25 U.L.  
0.25 U.L.  
5 (2.5) U.L.  
Clock (Active LOW Going Edge) Input  
Data Inputs From Source 0  
Data Inputs From Source 1  
Register Outputs (Note b)  
I
–I  
0a 0d  
I I  
1a 1d  
LOGIC SYMBOL  
Q Q  
a
d
NOTES:  
a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW.  
b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial  
(74) Temperature Ranges.  
FAST AND LS TTL DATA  
5-473  

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