生命周期: | Obsolete | 零件包装代码: | DIP |
包装说明: | DIP, DIP16,.3 | 针数: | 16 |
Reach Compliance Code: | unknown | HTS代码: | 8542.39.00.01 |
风险等级: | 5.16 | 系列: | LS |
JESD-30 代码: | R-PDIP-T16 | JESD-609代码: | e0 |
长度: | 20.07 mm | 逻辑集成电路类型: | J-K FLIP-FLOP |
位数: | 2 | 功能数量: | 2 |
端子数量: | 16 | 最高工作温度: | 70 °C |
最低工作温度: | 输出极性: | COMPLEMENTARY | |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | DIP |
封装等效代码: | DIP16,.3 | 封装形状: | RECTANGULAR |
封装形式: | IN-LINE | 电源: | 5 V |
传播延迟(tpd): | 20 ns | 认证状态: | Not Qualified |
座面最大高度: | 5.08 mm | 子类别: | FF/Latches |
最大供电电压 (Vsup): | 5.25 V | 最小供电电压 (Vsup): | 4.75 V |
标称供电电压 (Vsup): | 5 V | 表面贴装: | NO |
技术: | TTL | 温度等级: | COMMERCIAL |
端子面层: | Tin/Lead (Sn/Pb) | 端子形式: | THROUGH-HOLE |
端子节距: | 2.54 mm | 端子位置: | DUAL |
触发器类型: | NEGATIVE EDGE | 宽度: | 7.62 mm |
最小 fmax: | 45 MHz | Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
SN74LS112ANE4 | TI |
获取价格 |
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR | |
SN74LS112ANP1 | TI |
获取价格 |
IC,FLIP-FLOP,DUAL,J/K TYPE,LS-TTL,DIP,16PIN,PLASTIC | |
SN74LS112ANP3 | TI |
获取价格 |
SN74LS112ANP3 | |
SN74LS112ANS | MOTOROLA |
获取价格 |
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16, DIP-1 | |
SN74LS112ANSR | TI |
获取价格 |
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR | |
SN74LS112ANSRE4 | TI |
获取价格 |
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR | |
SN74LS112AW | ROCHESTER |
获取价格 |
J-K Flip-Flop | |
SN74LS112D | TI |
获取价格 |
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR | |
SN74LS112D | MOTOROLA |
获取价格 |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP | |
SN74LS112N | TI |
获取价格 |
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR |