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SN74LS00N PDF预览

SN74LS00N

更新时间: 2024-11-22 22:53:35
品牌 Logo 应用领域
德州仪器 - TI 栅极触发器逻辑集成电路光电二极管输入元件
页数 文件大小 规格书
18页 588K
描述
QUADRUPLE 2-INPUT POSITIVE-NAND GATES

SN74LS00N 技术参数

是否Rohs认证:符合生命周期:Active
零件包装代码:DIP包装说明:DIP-14
针数:14Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
Factory Lead Time:6 weeks风险等级:1.06
Samacsys Confidence:3Samacsys Status:Released
Samacsys PartID:182040Samacsys Pin Count:14
Samacsys Part Category:Integrated CircuitSamacsys Package Category:Dual-In-Line Packages
Samacsys Footprint Name:PDIPSamacsys Released Date:2017-01-12 12:59:53
Is Samacsys:N系列:LS
JESD-30 代码:R-PDIP-T14JESD-609代码:e4
长度:19.305 mm负载电容(CL):15 pF
逻辑集成电路类型:NAND GATE最大I(ol):0.008 A
湿度敏感等级:1功能数量:4
输入次数:2端子数量:14
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP14,.3封装形状:RECTANGULAR
封装形式:IN-LINE包装方法:TUBE
峰值回流温度(摄氏度):260电源:5 V
最大电源电流(ICC):4.4 mAProp。Delay @ Nom-Sup:15 ns
传播延迟(tpd):15 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:5.08 mm
子类别:Gates最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:COMMERCIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

SN74LS00N 数据手册

 浏览型号SN74LS00N的Datasheet PDF文件第2页浏览型号SN74LS00N的Datasheet PDF文件第3页浏览型号SN74LS00N的Datasheet PDF文件第4页浏览型号SN74LS00N的Datasheet PDF文件第5页浏览型号SN74LS00N的Datasheet PDF文件第6页浏览型号SN74LS00N的Datasheet PDF文件第7页 
SDLS025B − DECEMBER 1983 − REVISED OCTOBER 2003  
D
Package Options Include Plastic  
Small-Outline (D, NS, PS), Shrink  
Small-Outline (DB), and Ceramic Flat (W)  
Packages, Ceramic Chip Carriers (FK), and  
Standard Plastic (N) and Ceramic (J) DIPs  
D
Also Available as Dual 2-Input  
Positive-NAND Gate in Small-Outline (PS)  
Package  
SN5400 . . . J PACKAGE  
SN54LS00, SN54S00 . . . J OR W PACKAGE  
SN7400, SN74S00 . . . D, N, OR NS PACKAGE  
SN74LS00 . . . D, DB, N, OR NS PACKAGE  
(TOP VIEW)  
SN74LS00, SN74S00 . . . PS PACKAGE  
(TOP VIEW)  
V
2B  
2A  
2Y  
1A  
1B  
1Y  
2A  
2B  
V
CC  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1
2
3
4
8
7
6
5
1A  
1B  
1Y  
CC  
4B  
4A  
4Y  
3B  
3A  
3Y  
GND  
2Y  
GND  
8
SN5400 . . . W PACKAGE  
(TOP VIEW)  
SN54LS00, SN54S00 . . . FK PACKAGE  
(TOP VIEW)  
1A  
1B  
1Y  
4Y  
4B  
4A  
GND  
3B  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
3
2 1 20 19  
18  
4A  
NC  
4Y  
NC  
3B  
1Y  
NC  
2A  
4
5
6
7
8
V
17  
16  
15  
14  
CC  
2Y  
2A  
2B  
3A  
3Y  
NC  
2B  
8
9 10 11 12 13  
NC − No internal connection  
description/ordering information  
These devices contain four independent 2-input NAND gates. The devices perform the Boolean function  
Y = A B or Y = A + B in positive logic.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
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ꢡ ꢘꢥ ꢢꢟꢟ ꢚ ꢞꢨꢢ ꢛ ꢪꢗ ꢟꢢ ꢘ ꢚꢞꢢ ꢦꢧ ꢓ ꢘ ꢝꢥ ꢥ ꢚ ꢞꢨꢢ ꢛ ꢣꢛ ꢚ ꢦꢡꢠ ꢞꢟ ꢅ ꢣꢛ ꢚ ꢦꢡꢠ ꢞꢗꢚ ꢘ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74LS00N 替代型号

型号 品牌 替代类型 描述 数据表
SN74LS00NE4 TI

完全替代

QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SN54LS00J TI

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QUADRUPLE 2-INPUT POSITIVE-NAND GATES

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SN74LS00NS TI

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SN74LS00NSR TI

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QUADRUPLE 2-INPUT POSITIVE-NAND GATES