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SN74HCT595-Q1_V01 PDF预览

SN74HCT595-Q1_V01

更新时间: 2024-11-27 02:58:27
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德州仪器 - TI /
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描述
SN74HCT595-Q1 Automotive 8-Bit Shift Registers with 3-State Output Registers

SN74HCT595-Q1_V01 数据手册

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SN74HCT595  
SCLS880A – OCTOBER 2021 – REVISED DECEMBER 2021  
SN74HCT595 8-Bit Shift Registers with 3-State Output Registers  
1 Features  
3 Description  
LSTTL input logic compatible  
– VIL(max) = 0.8 V, VIH(min) = 2 V  
CMOS input logic compatible  
– II ≤ 1 µA at VOL, VOH  
The SN74HCT595 device contains an 8-bit, serial-in,  
parallel-out shift register that feeds an 8-bit D-type  
storage register. The storage register has parallel  
3-state outputs. Separate clocks are provided for  
both the shift and storage register. The shift register  
has a direct overriding clear (SRCLR) input, serial  
(SER) input, and a serial output (QH') for cascading.  
When the output-enable (OE) input is high, the  
storage register outputs are in a high-impedance  
state. Internal register data and serial output (QH') are  
not impacted by the operation of the OE input.  
4.5 V to 5.5 V operation  
Supports fanout up to 10 LSTTL loads  
Shift register has direct clear  
Extended ambient temperature range: –40°C to  
+125°C, TA  
2 Applications  
Device Information(1)  
Output expansion  
LED matrix control  
7-segment display control  
8-bit data storage  
PART NUMBER  
PACKAGE  
BODY SIZE (NOM)  
SN74HCT595PW  
TSSOP (16) 5.00 mm × 4.40 mm  
(1) For all available packages, see the orderable addendum at  
the end of the data sheet.  
13  
12  
10  
11  
14  
OE  
RCLK  
SRCLR  
SRCLK  
SER  
Q
Q
D
R
D
15  
Q
Q
QA  
D
R
D
1
QB  
QC  
2
3
4
5
6
QD  
QE  
QF  
QG  
Q
D
R
D
7
9
Q
QH  
QH’  
Logic Diagram (Positive Logic)  
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
 
 
 

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