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SN74HC191DRE4 PDF预览

SN74HC191DRE4

更新时间： 2024-11-06 20:32:59
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER 光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
21页 1054K
描述
Binary Counter, HC/UH Series, Synchronous, Positive Edge Triggered, 4-Bit, Bidirectional, CMOS, PDSO16, GREEN, PLASTIC, MS-012AC, SOIC-16

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中文翻译

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SN74HC191DRE4 技术参数

生命周期：Contact Manufacturer包装说明：SOP,
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.58其他特性：RCO OUTPUT
计数方向：BIDIRECTIONAL系列：HC/UH
JESD-30 代码：R-PDSO-G16长度：9.9 mm
负载/预设输入：YES逻辑集成电路类型：BINARY COUNTER
工作模式：SYNCHRONOUS位数：4
功能数量：1端子数量：16
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
传播延迟（tpd）：240 ns座面最大高度：1.75 mm
最大供电电压 (Vsup)：6 V最小供电电压 (Vsup)：2 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL触发器类型：POSITIVE EDGE
宽度：3.9 mm最小 fmax：19 MHz
Base Number Matches：1

SN74HC191DRE4 数据手册

 浏览型号SN74HC191DRE4的Datasheet PDF文件第2页浏览型号SN74HC191DRE4的Datasheet PDF文件第3页浏览型号SN74HC191DRE4的Datasheet PDF文件第4页浏览型号SN74HC191DRE4的Datasheet PDF文件第5页浏览型号SN74HC191DRE4的Datasheet PDF文件第6页浏览型号SN74HC191DRE4的Datasheet PDF文件第7页 
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SCLS121D − DECEMBER 1982 − REVISED OCTOBER 2003  
SN54HC191 . . . J OR W PACKAGE  
SN74HC191 . . . D, N, OR NS PACKAGE  
(TOP VIEW)  
D
D
D
D
D
D
D
D
Wide Operating Voltage Range of 2 V to 6 V  
Outputs Can Drive Up To 10 LSTTL Loads  
Low Power Consumption, 80-µA Max I  
CC  
B
V
A
1
2
3
4
5
6
7
8
16  
15  
CC  
Typical t = 13 ns  
pd  
4-mA Output Drive at 5 V  
Q
B
A
Q
14 CLK  
Low Input Current of 1 µA Max  
Single Down/Up Count-Control Line  
13  
12  
11  
10  
9
CTEN  
D/U  
RCO  
MAX/MIN  
LOAD  
C
Q
C
Q
D
GND  
Look-Ahead Circuitry Enhances Speed of  
Cascaded Counters  
D
D
Fully Synchronous in Count Modes  
D
Asynchronously Presettable With Load  
Control  
SN54HC191 . . . FK PACKAGE  
(TOP VIEW)  
description/ordering information  
The ’HC191 devices are 4-bit synchronous,  
reversible,  
up/down  
binary  
counters.  
3
2
1
20 19  
18  
CLK  
RCO  
NC  
Q
4
5
6
7
8
A
Synchronous counting operation is provided by  
having all flip-flops clocked simultaneously so that  
the outputs change coincident with each other  
when instructed by the steering logic. This mode  
of operation eliminates the output counting spikes  
CTEN  
NC  
17  
16  
15 MAX/MIN  
14  
9 10 11 12 13  
D/U  
LOAD  
Q
C
normally  
associated  
with  
asynchronous  
(ripple-clock) counters.  
The outputs of the four flip-flops are triggered on  
a low- to high-level transition of the clock (CLK)  
input if the count-enable (CTEN) input is low. A  
high at CTEN inhibits counting. The direction of  
the count is determined by the level of the  
down/up (D/U) input. When D/U is low, the counter  
counts up, and when D/U is high, it counts down.  
NC − No internal connection  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
PDIP − N  
SOIC − D  
Tube of 25  
Tube of 40  
Reel of 2500  
Reel of 250  
Reel of 2000  
Tube of 25  
Tube of 150  
Tube of 55  
SN74HC191N  
SN74HC191N  
SN74HC191D  
SN74HC191DR  
SN74HC191DT  
SN74HC191NSR  
SNJ54HC191J  
SNJ54HC191W  
SNJ54HC191FK  
−40°C to 85°C  
HC191  
SOP − NS  
CDIP − J  
HC191  
SNJ54HC191J  
SNJ54HC191W  
SNJ54HC191FK  
−55°C to 125°C  
CFP − W  
LCCC − FK  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
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Copyright 2003, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...21

中文翻译

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