ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢊ ꢆ
ꢋ ꢉꢌꢍ ꢎ ꢏꢐꢑꢐ ꢒꢒ ꢓꢒ ꢉꢒ ꢔ ꢐꢕ ꢀꢄꢍ ꢖ ꢎ ꢑꢓ ꢗ ꢍꢀ ꢎꢓ ꢑ
SCLS518 − AUGUST 2003
D OR PW PACKAGE
(TOP VIEW)
D
Qualification in Accordance With
AEC-Q100
†
D
Qualified for Automotive Applications
1
2
3
4
5
6
7
8
SH/LD
CLK
E
16
V
CC
D
Customer-Specific Configuration Control
Can Be Supported Along With
Major-Change Approval
15 CLK INH
14
13
12
11
D
C
B
A
F
G
H
D
ESD Protection Exceeds 1500 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Q
10 SER
H
GND
9
Q
H
D
D
D
D
D
D
D
D
D
D
Wide Operating Voltage Range of 2 V to 6 V
Outputs Can Drive Up To 10 LSTTL Loads
Low Power Consumption, 80-µA Max I
Typical t = 13 ns
pd
4-mA Output Drive at 5 V
Low Input Current of 1 µA Max
Complementary Outputs
CC
Direct Overriding Load (Data) Inputs
Gated Clock Inputs
Parallel-to-Serial Data Conversion
†
Contact factory for details. Q100 qualification data available on
request.
description/ordering information
The SN74HC165 is an 8-bit parallel-load shift register that, when clocked, shift the data toward a serial (Q )
H
output. Parallel-in access to each stage is provided by eight individual direct data (A−H) inputs that are enabled
by a low level at the shift/load (SH/LD) input. The SN74HC165 also features a clock-inhibit (CLK INH) function
and a complementary serial (Q ) output.
H
Clocking is accomplished by a low-to-high transition of the clock (CLK) input while SH/LD is held high and CLK
INH is held low. The functions of CLK and CLK INH are interchangeable. Since a low CLK and a low-to-high
transition of CLK INH also accomplish clocking, CLK INH should be changed to the high level only while CLK
is high. Parallel loading is inhibited when SH/LD is held high. While SH/LD is low, the parallel inputs to the
register are enabled independently of the levels of the CLK, CLK INH, or serial (SER) inputs.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
‡
PACKAGE
T
A
SOIC − D
Tape and reel
Tape and reel
SN74HC165QDRQ1
SN74HC165QPWRQ1
HC165Q1
HC165Q1
−40°C to 125°C
TSSOP − PW
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2003, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265