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SN74HC10QPWRQ1 PDF预览

SN74HC10QPWRQ1

更新时间: 2024-11-01 12:22:31
品牌 Logo 应用领域
德州仪器 - TI 栅极触发器逻辑集成电路光电二极管输入元件
页数 文件大小 规格书
10页 230K
描述
TRIPLE 3-INPUT POSITIVE-NAND GATE

SN74HC10QPWRQ1 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:ROHS COMPLIANT, PLASTIC, TSSOP-14针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.23
Is Samacsys:N系列:HC/UH
JESD-30 代码:R-PDSO-G14长度:5 mm
负载电容(CL):50 pF逻辑集成电路类型:NAND GATE
最大I(ol):0.004 A功能数量:3
输入次数:3端子数量:14
最高工作温度:125 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TR
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/6 V
Prop。Delay @ Nom-Sup:29 ns传播延迟(tpd):145 ns
认证状态:Not Qualified施密特触发器:NO
筛选级别:AEC-Q100座面最大高度:1.2 mm
子类别:Gates最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

SN74HC10QPWRQ1 数据手册

 浏览型号SN74HC10QPWRQ1的Datasheet PDF文件第2页浏览型号SN74HC10QPWRQ1的Datasheet PDF文件第3页浏览型号SN74HC10QPWRQ1的Datasheet PDF文件第4页浏览型号SN74HC10QPWRQ1的Datasheet PDF文件第5页浏览型号SN74HC10QPWRQ1的Datasheet PDF文件第6页浏览型号SN74HC10QPWRQ1的Datasheet PDF文件第7页 
SN74HC10-Q1  
TRIPLE 3-INPUT POSITIVE-NAND GATE  
SCLS531A − AUGUST 2003 − REVISED APRIL 2008  
D
D
Qualified for Automotive Applications  
D
D
D
Typical t = 9 ns  
pd  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
4-mA Output Drive at 5 V  
Low Input Current of 1 µA Max  
D OR PW PACKAGE  
(TOP VIEW)  
D
D
D
Wide Operating Voltage Range of 2 V to 6 V  
Outputs Can Drive Up to 10 LSTTL Loads  
Low Power Consumption, 20-µA Max I  
CC  
1A  
1B  
2A  
2B  
2C  
VCC  
1C  
1Y  
1
2
3
4
5
6
7
14  
13  
12  
11  
description/ordering information  
The ’HC10 device contains three independent  
3-input NAND gates. It performs the Boolean  
function Y = A B C or Y = A + B + C in positive logic.  
3C  
10 3B  
9
8
2Y  
GND  
3A  
3Y  
{
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
SOIC − D  
TSSOP − PW  
Tape and reel  
Tape and reel  
SN74HC10QDRQ1  
HC10QQ1  
HC10QQ1  
−40°C to 125°C  
SN74HC10QPWRQ1  
For the most current package and ordering information, see the Package Option Addendum at the end of this  
document, or see the TI web site at http://www.ti.com.  
Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.  
FUNCTION TABLE  
(each gate)  
INPUTS  
OUTPUT  
Y
A
H
L
B
H
X
L
C
H
X
X
L
L
H
H
H
X
X
X
logic diagram (positive logic)  
A
B
C
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2008, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74HC10QPWRQ1 替代型号

型号 品牌 替代类型 描述 数据表
SN74HC10QPWRG4Q1 TI

完全替代

TRIPLE 3-INPUT POSITIVE-NAND GATE
SN74HC10QPWREP TI

完全替代

TRIPLE 3-INPUT POSITIVE-NAND GATE
SN74HC10PW TI

类似代替

TRIPLE 3-INPUT POSITIVE-NAND GATES

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