ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢇꢈ ꢀꢁ ꢉꢃ ꢄꢅ ꢆꢇ
ꢊ ꢋꢌꢍ ꢎꢏ ꢐ ꢑꢌꢁ ꢍꢒꢊ ꢍꢓ ꢀꢌ ꢊ ꢌꢔꢏ ꢑꢁꢕꢁꢖ ꢗ ꢕꢊꢏ ꢀ
SCLS083D − DECEMBER 1982 − REVISED AUGUST 2003
D
D
D
Wide Operating Voltage Range of 2 V to 6 V
Outputs Can Drive Up To 10 LSTTL Loads
D
D
D
Typical t = 9 ns
pd
4-mA Output Drive at 5 V
Low Power Consumption, 20-µA Max I
Low Input Current of 1 µA Max
CC
SN54HC10 . . . J OR W PACKAGE
SN54HC10 . . . FK PACKAGE
(TOP VIEW)
SN74HC10 . . . D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
1A
1B
V
CC
1
2
3
4
5
6
7
14
13
12
11
3
2
1
20 19
18
1C
1Y
3C
1Y
NC
3C
NC
3B
2A
NC
2B
4
5
6
7
8
2A
17
16
15
14
2B
2C
10 3B
NC
2C
9
8
2Y
3A
3Y
9 10 11 12 13
GND
NC − No internal connection
description/ordering information
The ’HC10 devices contain three independent 3-input NAND gates. They perform the Boolean function
Y = A • B • C or Y = A + B + C in positive logic.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP − N
SOIC − D
Tube of 25
Tube of 50
Reel of 2500
Reel of 250
Reel of 2000
Reel of 2000
Tube of 90
Reel of 2000
Reel of 250
Tube of 25
Tube of 150
Tube of 55
SN74HC10N
SN74HC10N
SN74HC10D
SN74HC10DR
SN74HC10DT
SN74HC10NSR
SN74HC10DBR
SN74HC10PW
SN74HC10PWR
SN74HC10PWT
SNJ54HC10J
SNJ54HC10W
SNJ54HC10FK
HC10
SOP − NS
HC10
HC10
−40°C to 85°C
SSOP − DB
TSSOP − PW
HC10
CDIP − J
CFP − W
LCCC − FK
SNJ54HC10J
SNJ54HC10W
SNJ54HC10FK
−55°C to 125°C
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2003, Texas Instruments Incorporated
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