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SN74HC03PWR PDF预览

SN74HC03PWR

更新时间: 2024-11-04 05:04:51
品牌 Logo 应用领域
德州仪器 - TI 栅极触发器逻辑集成电路光电二极管输出元件输入元件
页数 文件大小 规格书
13页 418K
描述
QUADRUPLE 2-INPUT POSITIVE-NAND GATES WITH OPEN-DRAIN OUTPUTS

SN74HC03PWR 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP-14针数:14
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:1.33Is Samacsys:N
系列:HC/UHJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:5 mm
负载电容(CL):50 pF逻辑集成电路类型:NAND GATE
最大I(ol):0.0052 A湿度敏感等级:1
功能数量:4输入次数:2
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C输出特性:OPEN-DRAIN
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TR
峰值回流温度(摄氏度):260电源:2/6 V
最大电源电流(ICC):0.02 mAProp。Delay @ Nom-Sup:31 ns
传播延迟(tpd):131 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.2 mm
子类别:Gates最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmBase Number Matches:1

SN74HC03PWR 数据手册

 浏览型号SN74HC03PWR的Datasheet PDF文件第2页浏览型号SN74HC03PWR的Datasheet PDF文件第3页浏览型号SN74HC03PWR的Datasheet PDF文件第4页浏览型号SN74HC03PWR的Datasheet PDF文件第5页浏览型号SN74HC03PWR的Datasheet PDF文件第6页浏览型号SN74HC03PWR的Datasheet PDF文件第7页 
ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢇꢈ ꢀꢁ ꢉꢃ ꢄꢅ ꢆꢇ  
ꢊ ꢋꢌꢍꢎ ꢋꢏꢐ ꢑ ꢒ ꢓꢔꢁ ꢏꢋꢕ ꢏꢖ ꢀꢔ ꢕ ꢔꢗꢑ ꢓꢁꢌꢁ ꢍ ꢘ ꢌꢕꢑ ꢀ  
ꢙ ꢔꢕ ꢄ ꢖ ꢏꢑꢁ ꢓꢍꢎꢌꢔ ꢁ ꢖ ꢋꢕ ꢏ ꢋꢕꢀ  
SCLS077E − MARCH 1984 − REVISED NOVEMBER 2003  
D
D
D
Wide Operating Voltage Range of 2 V to 6 V  
Outputs Can Drive Up To 10 LSTTL Loads  
D
D
D
Typical t = 8 ns  
pd  
4-mA Output Drive at 5 V  
Low Power Consumption, 20-µA Max I  
Low Input Current of 1 µA Max  
CC  
SN54HC03 . . . J OR W PACKAGE  
SN74HC03 . . . D, N, NS, OR PW PACKAGE  
(TOP VIEW)  
SN54HC03 . . . FK PACKAGE  
(TOP VIEW)  
1A  
1B  
V
CC  
13 4B  
1
2
3
4
5
6
7
14  
3
2
1
20 19  
18  
4A  
NC  
4Y  
1Y  
NC  
2A  
4
5
6
7
8
12  
11  
10  
9
1Y  
4A  
4Y  
3B  
3A  
3Y  
17  
16  
2A  
2B  
15 NC  
14  
9 10 11 12 13  
NC  
2B  
2Y  
3B  
8
GND  
NC − No internal connection  
description/ordering information  
The ’HC03 devices contain four independent 2-input NAND gates. They perform the Boolean function  
Y = A B or Y = A + B in positive logic. The open-drain outputs require pullup resistors to perform correctly. They  
may be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND  
functions.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP − N  
SOIC − D  
Tube of 25  
Tube of 50  
Reel of 2500  
Reel of 250  
Reel of 2000  
Tube of 90  
Reel of 2000  
Tube of 25  
Tube of 150  
Tube of 55  
SN74HC03N  
SN74HC03N  
SN74HC03D  
SN74HC03DR  
SN74HC03DT  
SN74HC03NSR  
SN74HC03PW  
SN74HC03PWR  
SNJ54HC03J  
SNJ54HC03W  
SNJ54HC03FK  
HC03  
−40°C to 85°C  
SOP − NS  
HC03  
HC03  
TSSOP − PW  
CDIP − J  
CFP − W  
LCCC − FK  
SNJ54HC03J  
SNJ54HC03W  
SNJ54HC03FK  
−55°C to 125°C  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
ꢖ ꢛ ꢦ ꢞ ꢝꢩ ꢤꢣ ꢡꢢ ꢣꢝ ꢟꢦ ꢨꢚ ꢠꢛ ꢡ ꢡꢝ ꢰꢔ ꢐꢓ ꢏꢎ ꢱ ꢓꢇꢲꢂ ꢇꢂꢈ ꢠꢨꢨ ꢦꢠ ꢞ ꢠ ꢟꢥ ꢡꢥꢞ ꢢ ꢠ ꢞ ꢥ ꢡꢥ ꢢꢡꢥ ꢩ  
ꢡ ꢥ ꢢ ꢡꢚ ꢛꢯ ꢝꢜ ꢠ ꢨꢨ ꢦꢠ ꢞ ꢠ ꢟ ꢥ ꢡ ꢥ ꢞ ꢢ ꢪ  
ꢤ ꢛꢨ ꢥꢢꢢ ꢝ ꢡꢫꢥ ꢞ ꢭꢚ ꢢꢥ ꢛ ꢝꢡꢥ ꢩꢪ ꢖ ꢛ ꢠꢨ ꢨ ꢝ ꢡꢫꢥ ꢞ ꢦꢞ ꢝ ꢩꢤꢣ ꢡꢢ ꢈ ꢦꢞ ꢝ ꢩꢤꢣ ꢡꢚꢝ ꢛ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74HC03PWR 替代型号

型号 品牌 替代类型 描述 数据表
SN74HC03PW TI

完全替代

QUADRUPLE 2-INPUT POSITIVE-NAND GATES WITH OPEN-DRAIN OUTPUTS
SN74HC03PWE4 TI

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QUADRUPLE 2-INPUT POSITIVE-NAND GATES WITH OPEN-DRAIN OUTPUTS

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