SN74FB2031
9-BIT TTL/BTL ADDRESS/DATA TRANSCEIVER
SCBS176K – NOVEMBER 1991 – REVISED SEPTEMBER 1999
Compatible With IEEE Std 1194.1-1991
(BTL)
BIAS V
Minimizes Signal Distortion
CC
During Live Insertion or Withdrawal
TTL A Port, Backplane Transceiver Logic
(BTL) B Port
B-Port Biasing Network Preconditions the
Connector and PC Trace to the BTL
High-Level Voltage
Open-Collector B-Port Outputs Sink
100 mA
TTL-Input Structures Incorporate Active
Clamping to Aid in Line Termination
Isolated Logic-Ground and Bus-Ground
Pins Reduce Noise
Packaged in Plastic Quad Flatpack
High-Impedance State During Power Up
and Power Down
RC PACKAGE
(TOP VIEW)
52 51 50 49 48 47 46 45 44 43 42 41 40
1
39
38
37
36
35
34
33
32
31
30
29
28
27
GND
A3
GND
A4
GND
A5
GND
A6
GND
A7
GND
A8
GND
B2
2
3
GND
B3
GND
B4
GND
B5
GND
B6
4
5
6
7
8
9
10
11
12
13
GND
B7
GND
GND
14 15 16 17 18 19 20 21 22 23 24 25 26
description
The SN74FB2031 device is a 9-bit transceiver designed to translate signals between TTL and backplane
transceiver logic (BTL) environments. It is specifically designed to be compatible with IEEE Std 1194.1-1991.
The B port operates at BTL-signal levels. The open-collector B ports are specified to sink 100 mA. Two output
enables(OEBandOEB) are provided for the Boutputs. WhenOEBislow, OEBishigh, orV is less than 2.1 V,
CC
the B port is turned off.
The A port operates at TTL signal levels. The A outputs reflect the inverse of the data at the B port when the
A-port output enable (OEA) is high. When OEA is low or V
high-impedance state.
is less than 2.1 V, the A outputs are in the
CC
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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