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SDFS077A − D2932, MARCH 1987 − REVISED OCTOBER 1993
SN54F374 . . . J PACKAGE
SN74F374 . . . DB, DW, OR N PACKAGE
(TOP VIEW)
• Eight D-Type Flip-Flops in a Single Package
• 3-State Bus-Driving True Outputs
• Full Parallel Access for Loading
• Buffered Control Inputs
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
8Q
8D
7D
7Q
6Q
6D
• Package Options Include Plastic
Small-Outline (SOIC) and Shrink
Small-Outline (SSOP) Packages, Ceramic
Chip Carriers, and Plastic and Ceramic
DIPs
13 5D
12 5Q
description
These 8-bit flip-flops feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. They are
particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
11
GND
CLK
SN54F374 . . . FK PACKAGE
(TOP VIEW)
The eight flip-flops of the ′F374 are edge-triggered
D-type flip-flops. On the positive transition of the
clock (CLK) input, the Q outputs are set to the logic
levels that were set up at the data (D) inputs.
3
2
1
20 19
18
2D
2Q
3Q
3D
4D
8D
7D
7Q
6Q
4
5
6
7
8
17
16
15
A buffered output enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low) or a high-impedance state. In
the high-impedance state, the outputs neither
load nor drive the bus lines significantly. The
high-impedance state and the increased drive
provide the capability to drive bus lines without
need for interface or pullup components.
14 6D
9 10 11 12 13
The output enable (OE) input does not affect internal operations of the flip-flop. Old data can be retained or new
data can be entered while the outputs are in the high-impedance state.
The SN74F374 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count
and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54F374 is characterized for operation over the full military temperature range of −55°C to 125°C. The
SN74F374 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each flip-flop)
INPUTS
OUTPUT
Q
OE
L
CLK
D
H
L
↑
↑
H
L
L
L
H or L
X
X
X
Q
0
H
Z
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Copyright 1993, Texas Instruments Incorporated
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ꢠ ꢤ ꢡ ꢠꢙ ꢚꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢩ
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2−1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265