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SN74F374N-10 PDF预览

SN74F374N-10

更新时间： 2024-01-25 23:09:05
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
20页 861K
描述
F/FAST SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP20

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SN74F374N-10 技术参数

生命周期：Obsolete包装说明：DIP,
Reach Compliance Code：unknown风险等级：5.15
系列：F/FASTJESD-30 代码：R-PDIP-T20
长度：24.325 mm逻辑集成电路类型：BUS DRIVER
位数：8功能数量：1
端口数量：2端子数量：20
最高工作温度：70 °C最低工作温度：
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：DIP
封装形状：RECTANGULAR封装形式：IN-LINE
传播延迟（tpd）：10 ns认证状态：Not Qualified
座面最大高度：5.08 mm最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：NO技术：TTL
温度等级：COMMERCIAL端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
宽度：7.62 mmBase Number Matches：1

SN74F374N-10 数据手册

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SDFS077A − D2932, MARCH 1987 − REVISED OCTOBER 1993  
SN54F374 . . . J PACKAGE  
SN74F374 . . . DB, DW, OR N PACKAGE  
(TOP VIEW)  
• Eight D-Type Flip-Flops in a Single Package  
• 3-State Bus-Driving True Outputs  
• Full Parallel Access for Loading  
• Buffered Control Inputs  
OE  
1Q  
1D  
2D  
2Q  
3Q  
3D  
4D  
4Q  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
8Q  
8D  
7D  
7Q  
6Q  
6D  
• Package Options Include Plastic  
Small-Outline (SOIC) and Shrink  
Small-Outline (SSOP) Packages, Ceramic  
Chip Carriers, and Plastic and Ceramic  
DIPs  
13 5D  
12 5Q  
description  
These 8-bit flip-flops feature 3-state outputs  
designed specifically for driving highly capacitive  
or relatively low-impedance loads. They are  
particularly suitable for implementing buffer  
registers, I/O ports, bidirectional bus drivers, and  
working registers.  
11  
GND  
CLK  
SN54F374 . . . FK PACKAGE  
(TOP VIEW)  
The eight flip-flops of the ′F374 are edge-triggered  
D-type flip-flops. On the positive transition of the  
clock (CLK) input, the Q outputs are set to the logic  
levels that were set up at the data (D) inputs.  
3
2
1
20 19  
18  
2D  
2Q  
3Q  
3D  
4D  
8D  
7D  
7Q  
6Q  
4
5
6
7
8
17  
16  
15  
A buffered output enable (OE) input can be used  
to place the eight outputs in either a normal logic  
state (high or low) or a high-impedance state. In  
the high-impedance state, the outputs neither  
load nor drive the bus lines significantly. The  
high-impedance state and the increased drive  
provide the capability to drive bus lines without  
need for interface or pullup components.  
14 6D  
9 10 11 12 13  
The output enable (OE) input does not affect internal operations of the flip-flop. Old data can be retained or new  
data can be entered while the outputs are in the high-impedance state.  
The SN74F374 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count  
and functionality of standard small-outline packages in less than half the printed-circuit-board area.  
The SN54F374 is characterized for operation over the full military temperature range of −55°C to 125°C. The  
SN74F374 is characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
(each flip-flop)  
INPUTS  
OUTPUT  
Q
OE  
L
CLK  
D
H
L
↑
↑
H
L
L
L
H or L  
X
X
X
Q
0
H
Z
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Copyright 1993, Texas Instruments Incorporated  
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2−1  
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...20

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