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SN74F374

更新时间： 2024-02-04 06:32:39
品牌 Logo 应用领域
德州仪器 - TI 触发器输出元件
页数 文件大小 规格书
5页 77K
描述
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

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中文翻译

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SN74F374 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：SOIC
包装说明：SOP-20针数：20
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：6 weeks
风险等级：0.98Is Samacsys：N
控制类型：ENABLE LOW计数方向：UNIDIRECTIONAL
系列：F/FASTJESD-30 代码：R-PDSO-G20
JESD-609代码：e4长度：12.6 mm
负载电容（CL）：50 pF逻辑集成电路类型：BUS DRIVER
最大频率@ Nom-Sup：70000000 Hz最大I（ol）：0.024 A
湿度敏感等级：1位数：8
功能数量：1端口数量：2
端子数量：20最高工作温度：70 °C
最低工作温度：输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：DIP20,.3
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
包装方法：TR峰值回流温度（摄氏度）：260
电源：5 V最大电源电流（ICC）：86 mA
Prop。Delay @ Nom-Sup：10 ns传播延迟（tpd）：10 ns
认证状态：Not Qualified座面最大高度：2 mm
子类别：FF/Latches最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：TTL
温度等级：COMMERCIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
触发器类型：POSITIVE EDGE宽度：5.3 mm
Base Number Matches：1

SN74F374 数据手册

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SN54F374, SN74F374  
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS  
WITH 3-STATE OUTPUTS  
SDFS077A – D2932, MARCH 1987 – REVISED OCTOBER 1993  
SN54F374 . . . J PACKAGE  
SN74F374 . . . DB, DW, OR N PACKAGE  
(TOP VIEW)  
• Eight D-Type Flip-Flops in a Single Package  
• 3-State Bus-Driving True Outputs  
• Full Parallel Access for Loading  
• Buffered Control Inputs  
• Package Options Include Plastic  
Small-Outline (SOIC) and Shrink  
Small-Outline (SSOP) Packages, Ceramic  
Chip Carriers, and Plastic and Ceramic  
DIPs  
OE  
1Q  
1D  
2D  
2Q  
3Q  
3D  
4D  
4Q  
V
CC  
1
2
3
4
5
6
7
8
9
20  
19  
18  
17  
16  
15  
14  
8Q  
8D  
7D  
7Q  
6Q  
6D  
13 5D  
12 5Q  
11 CLK  
description  
These 8-bit flip-flops feature 3-state outputs  
designed specifically for driving highly capacitive  
or relatively low-impedance loads. They are  
particularly suitable for implementing buffer  
registers, I/O ports, bidirectional bus drivers, and  
working registers.  
GND 10  
SN54F374 . . . FK PACKAGE  
(TOP VIEW)  
The eight flip-flops of the ′F374 are edge-triggered  
D-type flip-flops. On the positive transition of the  
clock (CLK) input, the Q outputs are set to thelogic  
levels that were set up at the data (D) inputs.  
3
2
1
20 19  
18  
2D  
2Q  
3Q  
3D  
4D  
8D  
7D  
7Q  
6Q  
4
5
6
7
8
17  
16  
15  
A buffered output enable (OE) input can be used  
to place the eight outputs in either a normal logic  
state (high or low) or a high-impedance state. In  
the high-impedance state, the outputs neither  
load nor drive the bus lines significantly. The  
high-impedance state and the increased drive  
provide the capability to drive bus lines without  
need for interface or pullup components.  
14 6D  
9 10 11 12 13  
The output enable (OE) input does not affect internal operations of the flip-flop. Old data can be retained or new  
data can be entered while the outputs are in the high-impedance state.  
The SN74F374 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count  
and functionality of standard small-outline packages in less than half the printed-circuit-board area.  
The SN54F374 is characterized for operation over the full military temperature range of –55°C to 125°C. The  
SN74F374 is characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
(each flip-flop)  
INPUTS  
OUTPUT  
Q
OE  
L
CLK  
D
H
L
↑
↑
H
L
L
L
H or L  
X
X
X
Q
0
H
Z
Copyright 1993, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
2–1  
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
12345

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SN74F374 替代型号

型号 品牌 替代类型 描述 数据表
SN54F374 TI

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