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SN74F125N PDF预览

SN74F125N

更新时间: 2024-11-30 22:53:35
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路光电二极管输出元件PC
页数 文件大小 规格书
5页 69K
描述
QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS

SN74F125N 技术参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:DIP包装说明:DIP, DIP14,.3
针数:14Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:1.26Samacsys Confidence:
Samacsys Status:ReleasedSamacsys PartID:604751
Samacsys Pin Count:14Samacsys Part Category:Integrated Circuit
Samacsys Package Category:OtherSamacsys Footprint Name:DIP254P762X508-14
Samacsys Released Date:2017-01-12 12:59:53Is Samacsys:N
控制类型:ENABLE LOW计数方向:UNIDIRECTIONAL
系列:F/FASTJESD-30 代码:R-PDIP-T14
JESD-609代码:e4长度:19.3 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.064 A位数:1
功能数量:4端口数量:2
端子数量:14最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP14,.3
封装形状:RECTANGULAR封装形式:IN-LINE
包装方法:TUBE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):40 mA
Prop。Delay @ Nom-Sup:8 ns传播延迟(tpd):8 ns
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:COMMERCIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
翻译:N/A宽度:6.35 mm
Base Number Matches:1

SN74F125N 数据手册

 浏览型号SN74F125N的Datasheet PDF文件第2页浏览型号SN74F125N的Datasheet PDF文件第3页浏览型号SN74F125N的Datasheet PDF文件第4页浏览型号SN74F125N的Datasheet PDF文件第5页 
SN74F125  
QUADRUPLE BUS BUFFER GATE  
WITH 3-STATE OUTPUTS  
SDFS016A – D3211, JANUARY 1989 – REVISED OCTOBER 1993  
D OR N PACKAGE  
(TOP VIEW)  
3-State Outputs Drive Bus Lines or Buffer  
Memory Address Registers  
Package Options Include Plastic  
Small-Outline Packages and Standard  
Plastic 300-mil DIPs  
1OE  
1A  
V
CC  
13 4OE  
12 4A  
1
2
3
4
5
6
7
14  
1Y  
11  
10  
9
2OE  
2A  
4Y  
description  
3OE  
3A  
The SN74F125 features independent line drivers  
with 3-state outputs. Each output is disabled when  
the associated output enable (OE) input is high.  
2Y  
8
GND  
3Y  
TheSN74F125ischaracterizedforoperationfrom  
0°C to 70°C.  
FUNCTION TABLE  
(each buffer)  
INPUTS  
OUTPUT  
Y
H
L
OE  
A
H
L
L
L
H
X
Z
logic symbol  
logic diagram (positive logic)  
1
1
1
EN  
1OE  
3
6
1OE  
2
1Y  
2Y  
1A  
4
2
3
6
1A  
1Y  
2Y  
2OE  
5
2A  
4
10  
3OE  
9
2OE  
8
3Y  
4Y  
3A  
5
13  
2A  
11  
4OE  
12  
4A  
10  
3OE  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and  
IEC Publication 617-12.  
9
8
3A  
3Y  
4Y  
13  
4OE  
12  
11  
4A  
Copyright 1993, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
2–1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74F125N 替代型号

型号 品牌 替代类型 描述 数据表
SN74F125NE4 TI

类似代替

QUADRUPLE BUS BUFFER GATE
74F125PC FAIRCHILD

功能相似

Quad Buffer (3-STATE)
N74F125N NXP

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Quad buffers 3-State

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