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SN74CBTD3384DBRG4 PDF预览

SN74CBTD3384DBRG4

更新时间: 2024-11-19 12:02:15
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器开关逻辑集成电路光电二极管
页数 文件大小 规格书
21页 1053K
描述
10-BIT FET BUS SWITCHES WITH LEVEL SHIFTING

SN74CBTD3384DBRG4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP, SSOP24,.3针数:24
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.08其他特性:BUS SWITCH
系列:CBT/FST/QS/5C/BJESD-30 代码:R-PDSO-G24
JESD-609代码:e4长度:8.2 mm
逻辑集成电路类型:BUS DRIVER湿度敏感等级:1
位数:5功能数量:2
端口数量:2端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP24,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:5 V传播延迟(tpd):0.25 ns
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mmBase Number Matches:1

SN74CBTD3384DBRG4 数据手册

 浏览型号SN74CBTD3384DBRG4的Datasheet PDF文件第2页浏览型号SN74CBTD3384DBRG4的Datasheet PDF文件第3页浏览型号SN74CBTD3384DBRG4的Datasheet PDF文件第4页浏览型号SN74CBTD3384DBRG4的Datasheet PDF文件第5页浏览型号SN74CBTD3384DBRG4的Datasheet PDF文件第6页浏览型号SN74CBTD3384DBRG4的Datasheet PDF文件第7页 
SCDS025R − MAY 1995 − REVISED JANUARY 2004  
D
D
5-Switch Connection Between Two Ports  
TTL-Compatible Input Levels  
D
Designed to Be Used in Level-Shifting  
Applications  
SN54CBTD3384 . . . JT OR W PACKAGE  
SN54CBTD3384 . . . FK PACKAGE  
(TOP VIEW)  
SN74CBTD3384 . . . DB, DBQ, DGV, DW, OR PW PACKAGE  
(TOP VIEW)  
1OE  
1B1  
1A1  
1A2  
1B2  
1B3  
1A3  
1A4  
1B4  
V
CC  
1
2
3
4
5
6
7
8
9
24  
23  
22  
21  
20  
19  
18  
17  
16  
2B5  
2A5  
2A4  
2B4  
2B3  
2A3  
2A2  
2B2  
4
3
2 1 28 27 26  
5
6
7
8
9
25  
24  
23  
22  
21  
20  
19  
1A2  
1B2  
1B3  
NC  
2A4  
2B4  
2B3  
NC  
1A3  
1A4  
1B4  
2A3  
2A2  
2B2  
10  
11  
12 13 14 15 16 17 18  
1B5 10  
15 2B1  
1A5  
GND  
2A1  
2OE  
11  
12  
14  
13  
NC − No internal connection  
description/ordering information  
The ’CBTD3384 devices provide ten bits of high-speed TTL-compatible bus switching. The low on-state  
resistance of the switches allows connections to be made without adding propagation delay. A diode to V is  
CC  
integrated on the die to allow for level shifting from 5-V signals at the device inputs to 3.3-V signals at the device  
outputs.  
These devices are organized as two 5-bit switches with separate output-enable (OE) inputs. When OE is low,  
the switch is on, and port A is connected to port B. When OE is high, the switch is open, and the high-impedance  
state exists between the two ports.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
Tube  
SN74CBTD3384DW  
SN74CBTD3384DWR  
SN74CBTD3384DBR  
SN74CBTD3384DBQR  
SN74CBTD3384PW  
SN74CBTD3384PWR  
SN74CBTD3384DGVR  
SNJ54CBTD3384JT  
SNJ54CBTD3384W  
SNJ54CBTD3384FK  
SOIC − DW  
SSOP − DB  
CBTD3384  
Tape and reel  
Tape and reel  
CC384  
SSOP (QSOP) − DBQ Tape and reel  
Tube  
CBTD3384  
−40°C to 85°C  
TSSOP − PW  
CC384  
Tape and reel  
TVSOP − DGV  
CDIP − JT  
Tape and reel  
Tube  
CC384  
SNJ54CBTD3384JT  
SNJ54CBTD3384W  
SNJ54CBTD3384FK  
CFP − W  
Tube  
−55°C to 125°C  
LCCC − FK  
Tube  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2004, Texas Instruments Incorporated  
ꢚ ꢝ ꢨ ꢠ ꢟꢫ ꢦꢥ ꢣꢤ ꢥꢟ ꢡꢨ ꢪꢜ ꢢꢝ ꢣ ꢣꢟ ꢲꢏ ꢕꢎ ꢘꢙ ꢐ ꢎꢈꢉꢂ ꢈꢂꢊ ꢢꢪꢪ ꢨꢢ ꢠ ꢢ ꢡꢧ ꢣꢧꢠ ꢤ ꢢ ꢠ ꢧ ꢣꢧ ꢤꢣꢧ ꢫ  
ꢣ ꢧ ꢤ ꢣꢜ ꢝꢱ ꢟꢞ ꢢ ꢪꢪ ꢨꢢ ꢠ ꢢ ꢡ ꢧ ꢣ ꢧ ꢠ ꢤ ꢬ  
ꢦ ꢝꢪ ꢧꢤꢤ ꢟ ꢣꢭꢧ ꢠ ꢯꢜ ꢤꢧ ꢝ ꢟꢣꢧ ꢫꢬ ꢚ ꢝ ꢢꢪ ꢪ ꢟ ꢣꢭꢧ ꢠ ꢨꢠ ꢟ ꢫꢦꢥ ꢣꢤ ꢊ ꢨꢠ ꢟ ꢫꢦꢥ ꢣꢜꢟ ꢝ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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