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SCDS130A − SEPTEMBER 2003 − REVISED OCTOBER 2003
D
D
D
D
Undershoot Protection for Off-Isolation on
A and B Ports Up To −2 V
D
Control Inputs Can Be Driven by TTL or
5-V/3.3-V CMOS Outputs
Bidirectional Data Flow, With Near-Zero
Propagation Delay
D
D
D
I
Supports Partial-Power-Down Mode
off
Operation
Low ON-State Resistance (r
)
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
on
Characteristics (r = 3 Ω Typical)
on
Low Input/Output Capacitance Minimizes
Loading and Signal Distortion
ESD Performance Tested Per JESD 22
− 2000-V Human-Body Model
(A114-B, Class II)
(C
= 5.5 pF Typical)
io(OFF)
− 1000-V Charged-Device Model (C101)
D
D
Data and Control Inputs Provide
Undershoot Clamp Diodes
D
Supports Both Digital and Analog
Applications: USB Interface, Memory
Interleaving, Bus Isolation, Low-Distortion
Signal Gating
Low Power Consumption
(I
= 3 µA Max)
CC
D
V
Operating Range From 4 V to 5.5 V
CC
D
Data I/Os Support 0 to 5-V Signaling Levels
(0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
DB, DBQ, DGV, DW, OR PW PACKAGE
(TOP VIEW)
RGY PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
1OE
1A1
2B4
1A2
2B3
1A3
2B2
1A4
2B1
GND
CC
2OE
1B1
2A4
1B2
2A3
1B3
2A2
1B4
2A1
1
20
19
18
17
16
15
14
13
12
2
3
4
5
6
7
8
9
1A1
2B4
1A2
2B3
1A3
2B2
1A4
2B1
2OE
1B1
2A4
1B2
2A3
1B3
2A2
1B4
10
11
description/ordering information
The SN74CBT3244C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (r ),
on
allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the
SN74CBT3244C provides protection for undershoot up to −2 V by sensing an undershoot event and ensuring
that the switch remains in the proper OFF state.
The SN74CBT3244C is organized as two 4-bit bus switches with separate output-enable (1OE, 2OE) inputs.
It can be used as two 4-bit bus switches or as one 8-bit bus switch. When OE is low, the associated 4-bit bus
switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When
OE is high, the associated 4-bit bus switch is OFF, and the high-impedance state exists between the A and B
ports.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2003, Texas Instruments Incorporated
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1
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