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SN74CBT3125PWLE PDF预览

SN74CBT3125PWLE

更新时间: 2024-11-21 09:14:55
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器开关逻辑集成电路光电二极管
页数 文件大小 规格书
20页 794K
描述
QUADRUPLE FET BUS SWITCH

SN74CBT3125PWLE 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP-14针数:14
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.03Is Samacsys:N
其他特性:BUS SWITCH系列:CBT/FST/QS/5C/B
JESD-30 代码:R-PDSO-G14长度:5 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
位数:4功能数量:4
端口数量:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V传播延迟(tpd):0.35 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

SN74CBT3125PWLE 数据手册

 浏览型号SN74CBT3125PWLE的Datasheet PDF文件第2页浏览型号SN74CBT3125PWLE的Datasheet PDF文件第3页浏览型号SN74CBT3125PWLE的Datasheet PDF文件第4页浏览型号SN74CBT3125PWLE的Datasheet PDF文件第5页浏览型号SN74CBT3125PWLE的Datasheet PDF文件第6页浏览型号SN74CBT3125PWLE的Datasheet PDF文件第7页 
SN74CBT3125  
QUADRUPLE FET BUS SWITCH  
SCDS021I − MAY 1995 − REVISED SEPTEMBER 2002  
D
Standard ’125-Type Pinout (D, DB, DGV,  
and PW Packages)  
D
D
5-Ω Switch Connection Between Two Ports  
TTL-Compatible Input Levels  
D, DB, DGV, OR PW PACKAGE  
(TOP VIEW)  
DBQ PACKAGE  
(TOP VIEW)  
RGY PACKAGE  
(TOP VIEW)  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
VCC  
4OE  
4A  
4B  
3OE  
3A  
NC  
1OE  
1A  
1B  
2OE  
2A  
1OE  
1A  
1B  
2OE  
2A  
2B  
VCC  
1
2
3
4
5
6
7
14  
13 4OE  
12 4A  
11 4B  
1
14  
1A  
1B  
2OE  
2A  
13 4OE  
12 4A  
2
3
4
5
6
10  
9
3OE  
3A  
3B  
11  
10  
9
4B  
3OE  
3A  
3B  
NC  
8
2B  
GND  
GND  
2B  
7
8
NC − No internal connection  
description/ordering information  
The SN74CBT3125 quadruple FET bus switch features independent line switches. Each switch is disabled  
when the associated output-enable (OE) input is high.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
QFN − RGY  
Tape and reel  
SN74CBT3125RGYR  
SN74CBT3125D  
CU125  
Tube  
SOIC − D  
CBT3125  
Tape and reel  
Tape and reel  
SN74CBT3125DR  
SN74CBT3125DBR  
SN74CBT3125DBQR  
SN74CBT3125PWR  
SN74CBT3125DGVR  
SSOP − DB  
CU125  
CU125  
CU125  
CU125  
−40°C to 85°C  
SSOP (QSOP) − DBQ Tape and reel  
TSSOP − PW  
TVSOP − DGV  
Tape and reel  
Tape and reel  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
FUNCTION TABLE  
(each bus switch)  
INPUT  
FUNCTION  
OE  
L
A port = B port  
Disconnect  
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright © 2002, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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