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SN74CBT3125CDBRE4

更新时间： 2024-02-09 00:09:39
品牌 Logo 应用领域
德州仪器 - TI 开关
页数 文件大小 规格书
15页 411K
描述
QUADRUPLE FET BUS SWITCH 5-VBUS SWITCH WITH -2-V UNDERSHOOT PROTECTION

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中文翻译

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SN74CBT3125CDBRE4 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SSOP
包装说明：SSOP, SSOP14,.3针数：14
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.34系列：CBT/FST/QS/5C/B
JESD-30 代码：R-PDSO-G14JESD-609代码：e4
长度：6.2 mm逻辑集成电路类型：BUS DRIVER
湿度敏感等级：1位数：1
功能数量：4端口数量：2
端子数量：14最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装等效代码：SSOP14,.3
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, SHRINK PITCH
峰值回流温度（摄氏度）：260电源：5 V
传播延迟（tpd）：0.24 ns认证状态：Not Qualified
座面最大高度：2 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：5.3 mm

SN74CBT3125CDBRE4 数据手册

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SCDS122A − JULY 2003 − REVISED OCTOBER 2003  
D
D
D
D
Undershoot Protection for Off-Isolation on  
A and B Ports Up To −2 V  
D
Control Inputs Can Be Driven by TTL or  
5-V/3.3-V CMOS Outputs  
Bidirectional Data Flow, With Near-Zero  
Propagation Delay  
D
D
D
I
Supports Partial-Power-Down Mode  
off  
Operation  
Low ON-State Resistance (r  
)
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
on  
Characteristics (r = 3 Ω Typical)  
on  
Low Input/Output Capacitance Minimizes  
Loading and Signal Distortion  
ESD Performance Tested Per JESD 22  
− 2000-V Human-Body Model  
(A114-B, Class II)  
(C  
= 5 pF Typical)  
io(OFF)  
− 1000-V Charged-Device Model (C101)  
D
D
Data and Control Inputs Provide  
Undershoot Clamp Diodes  
D
Supports Both Digital and Analog  
Applications: USB Interface, Bus Isolation,  
Low-Distortion Signal Gating  
Low Power Consumption  
(I  
= 3 µA Max)  
CC  
D
V
Operating Range From 4 V to 5.5 V  
CC  
D
Data I/Os Support 0 to 5-V Signaling Levels  
(0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)  
RGY PACKAGE  
(TOP VIEW)  
D, DB, DGV, OR PW PACKAGE  
(TOP VIEW)  
DBQ PACKAGE  
(TOP VIEW)  
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14  
13  
12  
11  
10  
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1
2
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14  
13  
12  
11  
10  
9
V
4OE  
4A  
4B  
3OE  
3A  
3B  
NC  
1OE  
1A  
1B  
2OE  
2A  
1OE  
1A  
1B  
2OE  
2A  
2B  
V
CC  
4OE  
CC  
1
14  
4A  
4B  
3OE  
3A  
3B  
1A  
1B  
13 4OE  
12 4A  
2
3
4
5
6
11  
10  
9
2OE  
2A  
4B  
3OE  
3A  
8
2B  
GND  
GND  
2B  
NC  
7
8
NC − No internal connection  
description/ordering information  
The SN74CBT3125C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (r ),  
on  
allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the  
SN74CBT3125C provides protection for undershoot up to −2 V by sensing an undershoot event and ensuring  
that the switch remains in the proper OFF state.  
The SN74CBT3125C is organized as four 1-bit bus switches with separate output-enable (1OE, 2OE, 3OE,  
4OE) inputs. It can be used as four 1-bit bus switches or as one 4-bit bus switch. When OE is low, the associated  
1-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports.  
When OE is high, the associated 1-bit bus switch is OFF, and the high-impedance state exists between the A  
and B ports.  
This device is fully specified for partial-power-down applications using I . The I feature ensures that  
off  
off  
damaging current will not backflow through the device when it is powered down. The device has isolation during  
power off.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
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Copyright 2003, Texas Instruments Incorporated  
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ꢢ ꢦ ꢣ ꢢꢛ ꢜꢰ ꢞꢝ ꢡ ꢩꢩ ꢧꢡ ꢟ ꢡ ꢠ ꢦ ꢢ ꢦ ꢟ ꢣ ꢫ  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...15

中文翻译

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