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SCDS154B − OCTOBER 2003 − REVISED DECEMBER 2004
D
D
D
High-Bandwidth Data Path
(Up To 500 MHz )
D
D
Data and Control Inputs Provide
Undershoot Clamp Diodes
†
5-V-Tolerant I/Os with Device Powered Up
or Powered Down
Low Power Consumption
(I
= 0.7 mA Typical)
CC
Low and Flat ON-State Resistance (r
)
D
V
Operating Range From 2.3 V to 3.6 V
on
CC
Characteristics Over Operating Range
(r = 4 Ω Typical)
D
Data I/Os Support 0- to 5-V Signaling
Levels (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V,
5 V)
on
D
Rail-to-Rail Switching on Data I/O Ports
− 0- to 5-V Switching With 3.3-V V
− 0- to 3.3-V Switching With 2.5-V V
CC
CC
D
D
D
D
Control Inputs Can Be Driven by TTL or
5-V/3.3-V CMOS Outputs
D
D
Bidirectional Data Flow, With Near-Zero
Propagation Delay
I
Supports Partial-Power-Down Mode
off
Operation
Low Input/Output Capacitance Minimizes
Loading and Signal Distortion
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
(C
= 3.5 pF Typical)
io(OFF)
ESD Performance Tested Per JESD 22
− 2000-V Human-Body Model
(A114-B, Class II)
D
Fast Switching Frequency
(f = 20 MHz Max)
OE
†
For additional information regarding the performance
characteristics of the CB3Q family, refer to the TI
application report, CBT-C, CB3T, and CB3Q
Signal-Switch Families, literature number SCDA008.
− 1000-V Charged-Device Model (C101)
D
Supports Both Digital and Analog
Applications: Differential Signal Interface,
Memory Interleaving, Bus Isolation,
Low-Distortion Signal Gating
DB, DBQ, DGV, DW, OR PW PACKAGE
(TOP VIEW)
RGY PACKAGE
(TOP VIEW)
V
1
2
3
4
5
6
7
8
9
10
20
1OE
1A1
2B4
1A2
2B3
1A3
2B2
1A4
2B1
GND
CC
19 2OE
1
20
18 1B1
19
18
17
16
15
14
13
12
2
3
4
5
6
7
8
9
1A1
2B4
1A2
2B3
1A3
2B2
1A4
2B1
2OE
1B1
2A4
1B2
2A3
1B3
2A2
1B4
17
16
15
14
13
12
11
2A4
1B2
2A3
1B3
2A2
1B4
2A1
10
11
description/ordering information
The SN74CB3Q3244 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage
of the pass transistor, providing a low and flat ON-state resistance (r ). The low and flat ON-state resistance
on
allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The
device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data
bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q3244 provides an optimized
interface solution ideally suited for broadband communications, networking, and data-intensive computing
systems.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2004, Texas Instruments Incorporated
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1
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