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SN74BCT979DL PDF预览

SN74BCT979DL

更新时间: 2024-11-16 13:13:47
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
10页 146K
描述
9-Bit Registered BTL Transceiver With Parity Generator/Checker 48-SSOP 0 to 70

SN74BCT979DL 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP, SSOP48,.4针数:48
Reach Compliance Code:not_compliant风险等级:5.92
控制类型:INDEPENDENT CONTROL计数方向:BIDIRECTIONAL
系列:BCT/FBTJESD-30 代码:R-PDSO-G48
长度:15.875 mm逻辑集成电路类型:REGISTERED BUS TRANSCEIVER
最大I(ol):0.1 A位数:9
功能数量:1端口数量:2
端子数量:48最高工作温度:70 °C
最低工作温度:输出特性:OPEN-COLLECTOR
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP48,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
最大电源电流(ICC):69 mA传播延迟(tpd):11.7 ns
认证状态:Not Qualified座面最大高度:2.79 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:BICMOS
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
宽度:7.5 mmBase Number Matches:1

SN74BCT979DL 数据手册

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ꢀꢁꢂ ꢃꢄ ꢅꢆ ꢇꢂ ꢇ  
ꢇ ꢈꢄꢉ ꢆꢊ ꢋꢌꢍ ꢉ ꢀꢆ ꢌꢋꢌ ꢎꢊꢄ ꢆ ꢏꢊꢆ ꢋꢐ ꢁꢀ ꢅꢌ ꢉ ꢑꢌ ꢋ  
ꢒ ꢉꢆ ꢓꢊ ꢔꢐꢋꢉ ꢆ ꢕꢊꢍ ꢌ ꢁꢌꢋꢐꢆꢖ ꢋꢗꢅ ꢓꢌ ꢅ ꢘꢌ ꢋ  
SCBS115A − OCTOBER 1990 − REVISED NOVEMBER 1993  
DL PACKAGE  
(TOP VIEW)  
BiCMOS Design Significantly Reduces I  
CCZ  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883C, Method 3015; Exceeds  
200 V Using Machine Model (C = 200 pF,  
R = 0)  
V
1
2
3
4
5
6
7
8
9
48 OEBA  
47 LEAB  
46 B1  
CC  
AI1  
AO1  
AI2  
AO2  
GND  
AI3  
Support IEEE BTL Standard 1194.1-1991  
45 GND  
44 GND  
43 B2  
Open-Collector B Port Drives Load  
Impedances as Low as 10 Ω  
42 ERRA  
41 B3  
BTL Logic Level 1-V Bus Swing Reduces  
AO3  
AI4  
Power Consumption  
40 GND  
39 GND  
38 B4  
Latchable Transceiver With Output Sink  
of 24 mA at the A Bus and 100 mA at the  
B Bus  
AO4 10  
AI5 11  
GND 12  
AO5 13  
AI6 14  
AO6 15  
AI7 16  
37 ODD/EVEN  
36 B5  
Option to Generate and Check Parity or  
Feed-Through Data/Parity in Directions  
A to B or B to A  
35 SEL  
34 B6  
33 GND  
32 GND  
31 B7  
Independent Latch Enables for A-to-B  
and B-to-A Directions  
AO7 17  
GND 18  
AI8  
Select Pin for ODD/EVEN Parity  
ERRA and ERRB Output Pins for Parity  
19  
30  
ERRB  
Checking  
AO8 20  
APARI 21  
APARO 22  
29 B8  
28 GND  
27 GND  
Ability to Simultaneously Generate and  
Check Parity  
23  
24  
26  
25  
V
BPAR  
OEAB  
CC  
Packaged in 300-mil Plastic Shrink  
LEBA  
Small-Outline (DL) Package  
description  
The SN74BCT979 is a 9-bit to 9-bit parity transceiver with transparent latches. The device can operate as a  
feed-through transceiver, or it can generate/check parity from the 8-bit data bus in either direction. It has a  
guaranteed current-sinking capability of 24 mA at the A bus and 100 mA at the open-collector B bus.  
The SN74BCT979 features independent latch-enable (LEAB, LEBA) inputs for the A-to-B direction and the  
B-to-A direction, an ODD/EVEN input to select odd or even parity, and separate error-signal (ERRA, ERRB)  
outputs for checking parity.  
When communication between buses occurs, parity is generated and passed on to either bus as APARO or  
BPAR. Error detection of the parity generated from AI1−AI8 and B1−B8 can be checked by ERRA and ERRB,  
providing LEAB and LEBA are high and the mode select (SEL) is low. If SEL is high, the communication between  
buses is in a feed-through mode where parity is still generated and checked as ERRA and ERRB.  
The SN74BCT979 features open-collector driver outputs (B port) with a series Schottky diode to reduce  
capacitive loading to the bus. By using a 2-V pullup on the bus, the output signal swing will be approximately  
1 V, which reduces the power necessary to drive the bus load capacitance. The driver outputs are capable of  
driving an equivalent dc load of as low as 10 .  
The transceiver has a precision threshold set by an internal bandgap reference to give accurate input thresholds  
over V  
and temperature variations.  
CC  
This transceiver is compatible with backplane transceiver logic (BTL) technology at significantly reduced power  
dissipation per channel.  
The SN74BCT979 is characterized for operation from 0°C to 70°C.  
ꢆꢥ  
Copyright 1993, Texas Instruments Incorporated  
ꢡ ꢥ ꢢ ꢡꢚ ꢛꢯ ꢝꢜ ꢠ ꢨꢨ ꢦꢠ ꢞ ꢠ ꢟ ꢥ ꢡ ꢥ ꢞ ꢢ ꢪ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  

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