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SN74BCT956DWR PDF预览

SN74BCT956DWR

更新时间： 2024-09-29 20:04:47
品牌 Logo 应用领域
德州仪器 - TI 信息通信管理光电二极管逻辑集成电路
页数 文件大小 规格书
8页 124K
描述
Octal Bus Transceiver And Latch 24-SOIC 0 to 70

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中文翻译

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SN74BCT956DWR 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：SOP, SOP24,.4针数：24
Reach Compliance Code：not_compliant风险等级：5.92
控制类型：INDEPENDENT CONTROL计数方向：BIDIRECTIONAL
系列：BCT/FBTJESD-30 代码：R-PDSO-G24
长度：15.4 mm逻辑集成电路类型：BUS TRANSCEIVER
最大I（ol）：0.064 A位数：8
功能数量：1端口数量：2
端子数量：24最高工作温度：70 °C
最低工作温度：输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP24,.4
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
包装方法：TAPE AND REEL峰值回流温度（摄氏度）：NOT SPECIFIED
电源：5 VProp。Delay @ Nom-Sup：11.7 ns
传播延迟（tpd）：9.8 ns认证状态：Not Qualified
座面最大高度：2.65 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：BICMOS温度等级：COMMERCIAL
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
翻译：N/A宽度：7.5 mm
Base Number Matches：1

SN74BCT956DWR 数据手册

 浏览型号SN74BCT956DWR的Datasheet PDF文件第2页浏览型号SN74BCT956DWR的Datasheet PDF文件第3页浏览型号SN74BCT956DWR的Datasheet PDF文件第4页浏览型号SN74BCT956DWR的Datasheet PDF文件第5页浏览型号SN74BCT956DWR的Datasheet PDF文件第6页浏览型号SN74BCT956DWR的Datasheet PDF文件第7页 
SN74BCT956  
OCTAL BUS TRANSCEIVER AND LATCH  
WITH 3-STATE OUTPUTS  
SCBS088A – NOVEMBER 1991 – REVISED NOVEMBER 1993  
DW OR NT PACKAGE  
(TOP VIEW)  
• State-of-the-Art BiCMOS Design  
Significantly Reduces I  
CCZ  
• ESD Protection Exceeds 2000 V Per  
MIL-STD-883C, Method 3015; Exceeds  
200 V Using Machine Model (C = 200 pF,  
R = 0)  
LEAB  
SAB  
DIR  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
GND  
V
CC  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
LEBA  
SBA  
OE  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
2
3
4
• Latch Version of the ′BCT646  
5
• Independent Latches and Enables for  
6
A and B Buses  
7
8
• Multiplexed Real-Time and Stored Data  
• Package Options Include Plastic  
Small-Outline (DW) Packages and Standard  
Plastic 300-mil DIPs (NT)  
9
10  
11  
12  
B8  
description  
The SN74BCT956 consists of bus transceiver circuits, D-type latches, and control circuitry arranged for  
multiplexed transmission of data directly from the input bus or from the internal latches. Data on the A or B bus  
is stored in the latches when the appropriate latch-enable (LEAB or LEBA) input is low. Figure 1 illustrates the  
four fundamental bus-management functions that can be performed with the SN74BCT956.  
Output-enable (OE) and direction-control (DIR) inputs are provided to control the transceiver functions. In the  
transceiver mode (OE low), data present at the high-impedance port may be stored in either latch or in both.  
The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. When the  
appropriatelatch-enableinputishigh, thelatchistransparent, andreal-timedataisoutputregardlessofthelevel  
at the select control.  
The direction control (DIR) determines which bus receives data when OE is low. In the isolation mode (OE high),  
A data may be stored in one register and/or B data may be stored in the other register.  
When an output function is disabled, the input function is still enabled and may be used to store and transmit  
data. Only one of the two buses, A or B, may be driven at a time.  
The SN74BCT956 is characterized for operation from 0°C to 70°C.  
Copyright 1993, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
12345678

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