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SN74BCT29822NT PDF预览

SN74BCT29822NT

更新时间: 2024-11-14 19:50:51
品牌 Logo 应用领域
德州仪器 - TI 驱动信息通信管理光电二极管逻辑集成电路触发器
页数 文件大小 规格书
4页 60K
描述
10-Bit Bus-Interface Flip-Flop with 3-State Outputs 24-PDIP 0 to 70

SN74BCT29822NT 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP, DIP24,.3针数:24
Reach Compliance Code:not_compliant风险等级:5.87
系列:BCT/FBTJESD-30 代码:R-PDIP-T24
长度:31.64 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.048 A
位数:10功能数量:1
端口数量:2端子数量:24
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP24,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V传播延迟(tpd):10.3 ns
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:BICMOS
温度等级:COMMERCIAL端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:7.62 mmBase Number Matches:1

SN74BCT29822NT 数据手册

 浏览型号SN74BCT29822NT的Datasheet PDF文件第2页浏览型号SN74BCT29822NT的Datasheet PDF文件第3页浏览型号SN74BCT29822NT的Datasheet PDF文件第4页 
SN74BCT29822  
10-BIT BUS-INTERFACE FLIP-FLOP  
WITH 3-STATE OUTPUTS  
SCBS089B – FEBRUARY 1989 – REVISED NOVEMBER 1993  
DW OR NT PACKAGE  
(TOP VIEW)  
State-of-the-Art BiCMOS Design  
Significantly Reduces I  
CCZ  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883C, Method 3015; Exceeds  
200 V Using Machine Model (C = 200 pF,  
R = 0)  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
1
2
3
4
5
6
7
8
9
24  
23 1Q  
22 2Q  
21 3Q  
20 4Q  
19 5Q  
18 6Q  
17 7Q  
16 8Q  
15 9Q  
14 10Q  
13 CLK  
3-State Buffer-Type Outputs Drive Bus  
Lines Directly  
Package Options Include Plastic  
Small-Outline (DW) Packages and Standard  
Plastic 300-mil DIPs (NT)  
9D 10  
10D 11  
GND 12  
description  
This 10-bit bus-interface flip-flop features 3-state  
outputs designed specifically for driving highly  
capacitive or relatively low-impedance loads. It is  
particularly suitable for implementing wider buffer  
registers, I/O ports, bidirectional bus drivers with  
parity, and working registers.  
The ten flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock, the Q outputs will  
be complementary to the data (D) inputs.  
A buffered output-enable (OE) input can be used to place the ten outputs in either a normal logic state (high or  
low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines  
significantly. Thehigh-impedancestateandincreaseddriveprovidethecapabilitytodrivebuslineswithoutneed  
for interface or pullup components.  
The output enable (OE) does not affect the internal operation of the flip-flops. Old data can be retained or new  
data can be entered while the outputs are in the high-impedance state.  
The SN74BCT29822 is characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
(each flip-flop)  
INPUTS  
OUTPUT  
Q
OE  
L
CLK  
D
H
L
L
L
H
L
L
X
X
X
Q
0
H
Z
Copyright 1993, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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